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SN54ALVTH32374_08

更新时间: 2024-09-30 05:05:07
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德州仪器 - TI 触发器输出元件
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15页 521K
描述
2.5-V/3.3-V 32-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS

SN54ALVTH32374_08 数据手册

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SN54ALVTH32374, SN74ALVTH32374  
2.5-V/3.3-V 32-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS  
WITH 3-STATE OUTPUTS  
SCES280 – SEPTEMBER 1999  
State-of-the-Art Advanced BiCMOS  
Auto3-State Eliminates Bus Current  
Loading When Output Exceeds V  
Technology (ABT) Widebus Design for  
2.5-V and 3.3-V Operation and Low Static  
Power Dissipation  
+ 0.5 V  
CC  
Flow-Through Architecture Facilitates  
Printed Circuit Board Layout  
Support Mixed-Mode Signal Operation (5-V  
Input and Output Voltages With 2.3-V to  
Distributed V  
Minimizes High-Speed Switching Noise  
and GND Pin Configuration  
CC  
3.6-V V  
)
CC  
ESD Protection Exceeds JESD-22  
– 2000-V Human-Body Model  
– 200-V Machine Model (A115-A)  
– 1000-V Charged-Device Model (C101)  
(A114-A)  
Typical V  
< 0.8 V at V  
(Output Ground Bounce)  
OLP  
= 3.3 V, T = 25°C  
CC  
A
High Drive (–24/24 mA at 2.5-V V  
and  
CC  
–32/64 mA at 3.3-V V  
)
CC  
I
and Power-Up 3-State Support Hot  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
off  
Insertion  
Use Bus Hold on Data Inputs in Place of  
External Pullup/Pulldown Resistors to  
Prevent the Bus From Floating  
Packaged in Plastic Fine-Pitch Ball Grid  
Array Package  
NOTE: For tape and reel order entry:  
The GKER package is abbreviated to KR.  
description  
The ’ALVTH32374 devices are 32-bit edge-triggered D-type flip-flops with 3-state outputs designed for 2.5-V  
or 3.3-V) V operation, but with the capability to provide a TTL interface to a 5-V system environment. These  
CC  
devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and  
working registers.  
These devices can be used as four 8-bit flip-flops, two 16-bit flip-flops, or one 32-bit flip-flop. On the positive  
transition of the clock (CLK), the Q outputs of the flip-flops take on the logic levels set up at the data (D) inputs.  
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high  
or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive  
thebuslinessignificantly. Thehigh-impedancestateandincreaseddriveprovidethecapabilitytodrivebuslines  
without interface or pullup components.  
OE does not affect internal operations of the flip-flop. Old data can be retained or new data can be entered while  
the outputs are in the high-impedance state.  
When V  
is between 0 and 1.2 V, the device is in the high-impedance state during power up or power down.  
CC  
However, to ensure the high-impedance state above 1.2 V, OE should be tied to V  
the minimum value of the resistor is determined by the current-sinking capability of the driver.  
through a pullup resistor;  
CC  
These devices are fully specified for hot-insertion applications using I and power-up 3-state. The I circuitry  
off  
off  
disables the outputs, preventing damaging current backflow through the device when they are powered down.  
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,  
which prevents driver conflict.  
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.  
The SN54ALVTH32374 is characterized for operation over the full military temperature range of –55°C to  
125°C. The SN74ALVTH32374 is characterized for operation from –40°C to 85°C.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments Incorporated.  
Copyright 1999, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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