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SN54ALVTHR16245WD PDF预览

SN54ALVTHR16245WD

更新时间： 2024-09-29 21:54:55
品牌 Logo 应用领域
德州仪器 - TI 总线收发器输出元件
页数 文件大小 规格书
15页 394K
描述
2.5-V/3.3-V 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

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SN54ALVTHR16245WD 数据手册

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SN54ALVTHR16245, SN74ALVTHR16245  
2.5-V/3.3-V 16-BIT BUS TRANSCEIVERS  
WITH 3-STATE OUTPUTS  
SCES075D – JUNE 1996 – REVISED DECEMBER 2002  
SN54ALVTHR16245 . . . WD PACKAGE  
SN74ALVTHR16245 . . . DGG, DGV, OR DL PACKAGE  
(TOP VIEW)  
State-of-the-Art Advanced BiCMOS  
Technology (ABT) Widebus Design for  
2.5-V and 3.3-V Operation and Low  
Static-Power Dissipation  
1
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
1DIR  
1B1  
1B2  
GND  
1B3  
1B4  
1OE  
1A1  
1A2  
GND  
1A3  
1A4  
Support Mixed-Mode Signal Operation (5-V  
Input and Output Voltages With 2.3-V to  
2
3
3.6-V V  
)
CC  
4
Typical V  
<0.8 V at V  
(Output Ground Bounce)  
5
OLP  
CC  
= 3.3 V, T = 25°C  
6
A
7
V
V
High Drive (–12/12 mA at 3.3-V V  
)
CC  
CC  
CC  
8
1B5  
1B6  
GND  
1B7  
1B8  
2B1  
2B2  
GND  
2B3  
2B4  
1A5  
1A6  
GND  
1A7  
1A8  
2A1  
2A2  
GND  
2A3  
2A4  
I
and Power-Up 3-State Support Hot  
off  
9
Insertion  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
Use Bus Hold on Data Inputs in Place of  
External Pullup/Pulldown Resistors to  
Prevent the Bus From Floating  
Output Ports Have Equivalent 30-Ω Series  
Resistors, So No External Resistors Are  
Required  
Flow-Through Architecture Facilitates  
Printed Circuit Board Layout  
V
V
CC  
CC  
Distributed V  
High-Speed Switching Noise  
and GND Pins Minimize  
2B5  
2B6  
GND  
2B7  
2B8  
2A5  
2A6  
GND  
2A7  
2A8  
2OE  
CC  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
2DIR  
– 1000-V Charged-Device Model (C101)  
description/ordering information  
The’ALVTHR16245devicesare16-bit(dual-octal)noninverting3-statetransceiversdesignedfor2.5-Vor3.3-V  
V
operation, but with the capability to provide a TTL interface to a 5-V system environment.  
CC  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
†
PACKAGE  
T
A
SSOP – DL  
Tape and reel SN74ALVTHR16245LR  
ALVTHR16245  
TSSOP – DGG Tape and reel SN74ALVTHR16245GR  
ALVTHR16245  
TR245  
–40°C to 85°C  
–55°C to 125°C  
TVSOP – DGV  
VFBGA – GQL  
CFP – WD  
Tape and reel SN74ALVTHR16245VR  
Tape and reel SN74ALVTHR16245KR  
TR245  
Tube  
SNJ54ALVTHR16245W  
SNJ54ALVTHR16245W  
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are  
available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Widebus is a trademark of Texas Instruments.  
Copyright 2002, Texas Instruments Incorporated  
UNLESS OTHERWISE NOTED this document contains PRODUCTION  
DATA information current as of publication date. Products conform to  
specifications per the terms of Texas Instruments standard warranty.  
Production processing does not necessarily include testing of all  
parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...15

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