Datasheet > SN54-74LS669

SN54-74LS669

更新时间： 2024-10-01 22:21:35

品牌	Logo	应用领域
安森美 - ONSEMI		计数器
页数	文件大小	规格书
4页	78K
描述
SYNCHRONOUS 4-BIT UP/DOWN COUNTER

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SN54-74LS669 数据手册

SN54/74LS669

SYNCHRONOUS 4-BIT

UP/DOWN COUNTER

The SN54/74LS669 is a synchronous 4-bit up/down counter. The LS669 is

a 4-bit binary counter. For high speed counting applications, this presettable

counter features an internal carry lookahead for cascading purposes. By

clocking all flip-flops simultaneously so the outputs change coincident with

each other (when instructed to do so by the count enable inputs and internal

gating) synchronous operation is provided. This helps to eliminate output

counting spikes, normally associated with asynchronous (ripple-clock) count-

ers. Thefourmaster-slaveflip-flopsaretriggeredontherising(positive-going)

edge of the clock waveform by a buffered clock input.

SYNCHRONOUS 4-BIT

UP/DOWN COUNTER

LOW POWER SCHOTTKY

Circuitry of the load inputs allows loading with the carry-enable output of the

cascaded counters. Because loading is synchronous, disabling of the counter

by setting up a low level on the load input will cause the outputs to agree with

the data inputs after the next clock pulse.

J SUFFIX

CERAMIC

Cascading counters for N-bit synchronous applications are provided by the

carry look-ahead circuitry, without additional gating. Two count-enable inputs

and a carry output help accomplish this function. Count-enable inputs (P and

T) must both be low to count. The level of the up-down input determines the

direction of the count. When the input level is low, the counter counts down,

and when the input is high, the count is up. Input T is fed forward to enable the

carry output. The carry output will now produce a low level output pulse with a

CASE 620-09

N SUFFIX

PLASTIC

CASE 648-08

duration ≈ equal to the high portion of the Q output when counting up and

when counting down ≈ equal to the low portion of the Q output. This low level

carry pulse may be utilized to enable successive cascaded stages. Regard-

less of the level of the clock input, transitions at the P or T inputs are allowed.

By diode-clamping all inputs, transmission line effects are minimized which

allows simplification of system design.

Any changes at control inputs (ENABLE P, ENABLE T, LOAD, UP/DOWN)

will have no effect on the operating mode until clocking occurs because of the

fully independant clock circuits. Whether enabled, disabled, loading or count-

ing, the function of the counter is dictated entirely by the conditions meeting

the stable setup and hold times.

D SUFFIX

SOIC

CASE 751B-03

ORDERING INFORMATION

• Programmable Look-Ahead Up/Down Binary/Decade Counters

• Fully Synchronous Operation for Counting and Programming

• Internal Look-Ahead for Fast Counting

• Carry Output for n-Bit Cascading

SN54LSXXXJ

SN74LSXXXN Plastic

SN74LSXXXD SOIC

Ceramic

• Fully Independent Clock Circuit

• Buffered Outputs

CONNECTION DIAGRAM (TOP VIEW)

OUTPUTS

RIPPLE

ENABLE

CARRY

OUTPUT

LOAD

RIPPLE

CARRY

OUTPUT

ENABLE

LOAD

UP/DOWN

ENABLE

U/D

ENABLE GND

DATA INPUTS

FAST AND LS TTL DATA

5-1

12 3 4

中文翻译

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与SN54-74LS669相关器件

型号	品牌	获取价格	描述	数据表
SN54-74LS90	ONSEMI	获取价格	DECADE COUNTER; DIVIDE-BY-TWELVE COUNTER; 4-BIT BINARY COUNTER
SN5474W	TI	获取价格	DUAL D-TYPE POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH PRESET AND CLEAR
SN5474W-10	TI	获取价格	IC TTL/H/L SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDFP14,
SN5475	TI	获取价格	4-BIT BISTABLE LATCHES
SN5475_12	TI	获取价格	4-BIT BISTABLE LATCHES
SN5475J	TI	获取价格	4-BIT BISTABLE LATCHES
SN5475J-00	TI	获取价格	TTL/H/L SERIES, DUAL HIGH LEVEL TRIGGERED D LATCH, COMPLEMENTARY OUTPUT, CDIP16
SN-5475OHM0.01%	VISHAY	获取价格	Fixed Resistor, Wire Wound, 4W, 475ohm, 212V, 0.01% +/-Tol, 20ppm/Cel, Surface Mount, 8230
SN5475W	TI	获取价格	4-BIT BISTABLE LATCHES
SN5475W-00	TI	获取价格	TTL/H/L SERIES, DUAL HIGH LEVEL TRIGGERED D LATCH, COMPLEMENTARY OUTPUT, CDFP16

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