SMP08FP

更新时间： 2024-01-17 06:17:33

品牌	Logo	应用领域
亚德诺 - ADI		/
页数	文件大小	规格书
8页	265K
描述
Octal Sample-and-Hold with Multiplexed Input

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技术参数
数据手册

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SMP08FP 技术参数

生命周期：	Obsolete	Reach Compliance Code：	unknown
风险等级：	5.63	放大器类型：	SAMPLE AND HOLD CIRCUIT
JESD-30 代码：	R-PDSO-G16	端子数量：	16
封装主体材料：	PLASTIC/EPOXY	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE	认证状态：	Not Qualified
子类别：	Sample and Hold Circuit	表面贴装：	YES
端子形式：	GULL WING	端子位置：	DUAL
Base Number Matches：	1

SMP08FP 数据手册

SMP08

+12V

SMP08

REF02

+12V

+5V

DIGITAL

INPUTS

REF

DAC8228

GND

CHANNEL DECODING

12 CH

ADDRESS

BUS

PIN 9 PIN 10 PIN 11 PIN 6

INH

ADDRESS

DECODE

DGND

INH

NONE

–

+12V

0.1µF

Figure 18. 8-Channel Multiplexed D/A Converter

Do not apply signals to the SMP08 with power off unless the

input current is limited to less than 10 mA.

1/2 LSB accuracy (1 LSB of an 8-bit DAC is equivalent to

19.5 mV out of a full-scale voltage of 5 V). For a 10-bit DAC

the refresh rate must be less than 120 ms, and, for a 12-bit

system, 31 ms. This implementation is very cost effective com-

pared to using multiple DACs as the number of output channels

increases.

TYPICAL APPLICATIONS

AN 8-CHANNEL MULTIPLEXED D/A CONVERTER

Figure 18 illustrates a typical demultiplexing function of the

SMP08. It is used to sample-and-hold eight different output

voltages corresponding to eight different digital codes from a

D/A converter. The SMP08’s droop rate of 20 mV/s requires a

refresh once every 500 ms, before the voltage drifts beyond

REV. D

–7–

1...4 5 678

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