Datasheet > SM6010

SM6010

更新时间： 2024-02-16 16:06:22

品牌	Logo	应用领域
夏普 - SHARP		计算机
页数	文件大小	规格书
2页	27K
描述
16-Bit Single- Chip Microcomputer

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技术参数
数据手册

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SM6010 技术参数

生命周期：	Obsolete	包装说明：	QFP-100
Reach Compliance Code：	unknown	风险等级：	5.83
具有ADC：	YES	地址总线宽度：	16
位大小：	16	最大时钟频率：	30 MHz
DAC 通道：	NO	DMA 通道：	YES
JESD-30 代码：	S-PQFP-G100	I/O 线路数量：	40
端子数量：	100	最高工作温度：	70 °C
最低工作温度：	-20 °C	PWM 通道：	YES
封装主体材料：	PLASTIC/EPOXY	封装代码：	QFP
封装形状：	SQUARE	封装形式：	FLATPACK
认证状态：	Not Qualified	最大供电电压：	5.5 V
最小供电电压：	4.5 V	标称供电电压：	5 V
表面贴装：	YES	技术：	CMOS
温度等级：	COMMERCIAL	端子形式：	GULL WING
端子位置：	QUAD	uPs/uCs/外围集成电路类型：	MICROCONTROLLER
Base Number Matches：	1

SM6010 数据手册

PRODUCT INFORMATION

Integrated Circuits

Group

APPLICATIONS:

•

Pager

•

PDA

•

SM6010 16-Bit Single-

Chip Microcomputer

FEATURES

Digital Camera

• 1 bit/pixel binary mode

• Gray mode, 4-level 2-bits/pixel and 16-level 4-bits/pixel

• LCD display data, 4, 2, 1-bit transfer

• Maximum resolution

• CPU

– General purpose registers 16-bit × 16

– 62 basic instruction (bit manipulation instructions suitable

for controlling, bit transfer instructions, bit branch instruc-

tions, high speed multiplication and division instructions

(16-bits × 16-bits, 16-bits ÷ 16-bits, 32-bits ÷ 16-bits)).

– 10 addressing modes

– Horizontal

• 1,024 pixels in binary mode

• 512 pixels in 4-level gray shade mode,

• 256 pixels in 16-level gray shade mode

– Vertical: 256 lines

– 16M of address space

• Support vertical display screen

• DMA: Main memory → LCDC buffer

• Real time clock

– An interrupt request starts a high performance automatic

data transfer (DTS). Appropriate settings of interrupts and

registers enable hardware automatic data transfer. Various

functions can be operated successively and the resultant data

can also be successfully be stored.

– Using 32.768 kHz clock

– Seconds, minutes, hours, days

– 1-minute or 1-second or 1-day interrupt

– Alarm register

– System clock cycle

• 0.133 µs MIN. (V = 4.5 V to 5.5 V at 30 MHz main

• Watchdog timer (overrun detect timer)

– 8-bit × 1

clock cycle)

• 0.2 µs MIN. (V = 2.7 V to 5.5 V, at 20 MHz main

– 51 µs up to 209 ms at 10 MHz (internal)

• Serial interface: Serial interface × 1 channel

• SCI (Serial Communication Interface)

– Programmable between UART and synchronized

– UART

clock cycle)

– Selectable system clocks divided by 2 up to 16 main clocks

for low power operation

• Memory interface

– 16-bit external address bus

• Only TxD, RxD supported

• Built-in baud rate generator

• Stop bit: 1, 2-bit

– Optional A24 to A16 capable of 32M for data and 16M for code

• Built-in main clock oscillator for system clock

• Built-in sub clock oscillator for real time clock

• 21 total software interrupts

• Even, odd and non-parity bits

• Error detection frame, parity, overrun

– Synchronized

– 16 maskable interrupts (8 external, 8 internal)

– 5 nonmaskable interrupts

• 8-bit data

• Error detection: Overrun

• SIR (Serial Infra-Red Interface)

– Using UART

– Nonmaskable interrupts, when used in conjunction with

BST instruction, can trigger the software reset.

• Standby function: Halt mode/Stop mode

• I/O ports × 40

– IrDA SIR (version 1.0) compatible

– Sharp DASK SIR compatible

– From 2.4 kb/s up to 115.2 kb/s IrDA data rate

– From 2.4 kb/s up to 57.6 kb/s DASK data rate

– Inputs ports × 8 (also serve as A/D input)

– I/O ports × 32 (also serve as functional pins)

• LCD controller

– Frame buffer resides in system memory

– LCD display modes

The information for this document is from the Microcomputer Databook, issued in March 1997.

SMT98028

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