Datasheet > SM5921A

SM5921A

更新时间： 2022-04-23 23:00:11

品牌	Logo	应用领域
NPC		/
页数	文件大小	规格书
27页	152K
描述
8-channel Lip Sync Delay

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数据手册

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SM5921A 数据手册

SM5921A

BLOCK DIAGRAM

WPOLN WCKI BCKI DIA DIB DIC DID

Input data interface

TEST

TEST2

TEST3

RSTN

CKE

Arithmetic

Sequencer block

operation block

CLKO

DQM

Address controller

A0 to A10

DQ0 to DQ15

CSN

CASN

RASN

WEN

SDRAM interface

XCS

SCLK

MCU interface

SIO

OEN

Output data interface

DMUTEN

DOA DOB DOC DOD

PIN DESCRIPTION

Setting

Number

Name

I/O

Function

HIGH

LOW

VDD

WCKI

BCKI

DIA

–

Supply pin

Word clock input

Bit clock input (64fs)

Serial data input A

Serial data input B

Serial data input C

Serial data input D

DIB

DIC

DID

XCS

MCU latch enable input

MCU clock input

MCU data input

MCU data output

Test input pin

SCLK

SIO

–

TEST2

TEST3

DMUTEN

RSTN

VSS

Test

Test input pin

Direct mute control

Reset input pin

Ground pin

Mute

Reset

VDD

TEST

DOA

DOB

DOC

DOD

–

Supply pin

Test input pin

Test

Serial data output A

Serial data output B

Serial data output C

Serial data output D

SEIKO NPC CORPORATION —2

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