Datasheet > SM5902

SM5902

更新时间： 2024-02-22 06:11:35

品牌	Logo	应用领域
NPC		存储控制器
页数	文件大小	规格书
40页	309K
描述
compression and non compression type shock-proof memory controller

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技术参数
数据手册

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SM5902 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
包装说明：	QFP, QFP44,.5SQ,32	Reach Compliance Code：	unknown
风险等级：	5.74	商用集成电路类型：	CONSUMER CIRCUIT
JESD-30 代码：	S-PQFP-G44	端子数量：	44
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	QFP
封装等效代码：	QFP44,.5SQ,32	封装形状：	SQUARE
封装形式：	FLATPACK	电源：	3/5 V
认证状态：	Not Qualified	子类别：	Other Consumer ICs
最大压摆率：	12 mA	表面贴装：	YES
温度等级：	INDUSTRIAL	端子形式：	GULL WING
端子节距：	0.8 mm	端子位置：	QUAD
Base Number Matches：	1

SM5902 数据手册

SM5902AF

compression and non compression type

shock-proof memory controller

NIPPON PRECISION CIRCUITS INC.

Overview

The SM5902 is a compression and non compres-

sion type shock-proof memory controller LSI for

compact disc players. The compression level can

be set in 4 levels, and external memory can be

selected from 4 options (1M, 4M, 4M× 2, 16M).

Digital attenuator, soft mute and related functions

are also incorporated. It operates from a 2.4 to 5.5

V wide supply voltage range.

Features

- 2-channel processing

Data residual detector:

- Serial data input

15-bit operation, 16-bit output

Digital attenuator

2s complement, 16-bit/MSB first, right-justified

format

8-bit setting

Wide capture function

Soft attenuator function

(up to 3 × speed input rate)

Noiseless attenuation-level switching

(256- step switching in 23 ms max.)

Soft mute function

- System clock input

384fs (16.9344 MHz)

- Shock-proof memory controller

ADPCM compression method

4-level compression mode selectable

4-bit compression mode 2.78 s/Mbit

5-bit compression mode 2.22 s/Mbit

6-bit compression mode 1.85 s/Mbit

Full-bit non compression mode 0.74 s/Mbit

4 external DRAM configurations selectable

1 × 16M DRAM (4M × 4 bits, refresh cycle =

2048 cycle)

Mute ON in 23 ms max.

Direct return after soft mute release

Forced mute

- Extension I/O

Microcontroller interface for external control

using 5 extension I/O pins

- +2.4 to +5.5 V wide operating voltage range

- Schmitt inputs

All input pins (including I/O pins) except CLK

(system clock)

- Reset signal noise elimination

Approximately 3.8 µs or longer (65 system

clock pulses) continuous LOW-level reset

- Digital audio interface (DIT)

- 44-pin QFP package (0.8 mm pin pitch)

1 × or 2 × 4M DRAM (1M × 4 bits)

1 × 1M DRAM (256k × 4 bits)

DRAM at 5V operation is usable for Low-volt-

age operation

- Compression mode selectable

- Microcontroller interface

Serial command write and status read-out

Ordering Information

SM5902AF 44pin QFP

NIPPON PRECISION CIRCUITS-1

12 3 4 5 6 7...40

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