Datasheet > SI511

SI511

更新时间： 2022-04-16 23:22:04

品牌	Logo	应用领域
芯科 - SILICON		振荡器晶体振荡器
页数	文件大小	规格书
26页	234K
描述
CRYSTAL OSCILLATOR 100 kHZ TO 250 MHZ

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SI511 数据手册

Si510/511

CRYSTAL OSCILLATOR (XO) 100 kHZ TO 250 MHZ

Features

Si5602



Supports any frequency from

100 kHz to 250 MHz

Low jitter operation

2 to 4 week lead times

Total stability includes 10-year

aging



3.3, 2.5, or 1.8 V operation

Differential (LVPECL, LVDS,

HCSL) or CMOS output options

Optional integrated 1:2 CMOS

fanout buffer



Runt suppression on OE and

power on



Comprehensive production test

coverage includes crystal ESR and  Industry standard 5 x 7 and

DLD

3.2 x 5 mm packages

On-chip LDO regulator for power

supply noise filtering



Pb-free, RoHS compliant

–40 to 85 C operation

Ordering Information:

Applications

See page 14.



SONET/SDH/OTN

Gigabit Ethernet

Fibre Channel/SAS/SATA

PCI Express



3G-SDI/HD-SDI/SDI

Telecom

Switches/routers



Pin Assignments:

See page 12.

FPGA/ASIC clock generation

Description

The Si510/511 XO utilizes Silicon Laboratories' advanced DSPLL technology

to provide any frequency from 100 kHz to 250 MHz. Unlike a traditional XO

where a different crystal is required for each output frequency, the Si510/511

uses one fixed crystal and Silicon Labs’ proprietary DSPLL synthesizer to

generate any frequency across this range. This IC-based approach allows

the crystal resonator to provide enhanced reliability, improved mechanical

robustness, and excellent stability. In addition, this solution provides superior

supply noise rejection, simplifying low jitter clock generation in noisy

environments. Crystal ESR and DLD are individually production-tested to

guarantee performance and enhance reliability. The Si510/511 is factory-

configurable for a wide variety of user specifications, including frequency,

supply voltage, output format, output enable polarity, and stability. Specific

configurations are factory-programmed at time of shipment, eliminating long

lead times and non-recurring engineering charges associated with custom

frequency oscillators.

V_DD

GND

CLK

Si510 (CMOS)

V_DD

CLK–

CLK+

GND

Functional Block Diagram

Si510(LVDS/LVPECL/HCSL/

Dual CMOS)

V_DD

Low Noise Regulator

Fixed

Frequency

Oscillator

Any-Frequency

0.1 to 250 MHz

CLK+

CLK–

DSPLL^®Synthesis

GND

CLK+

Si511(LVDS/LVPECL/HCSL/

Dual CMOS)

GND

Rev. 1.1 1/13

Si510/511

12 3 4 5 6 7...26

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