SDC2UV6482-100T-S PDF预览

SDC2UV6482-100T-S

更新时间: 2025-08-17 20:06:55
品牌 Logo 应用领域
富士通 - FUJITSU 时钟动态存储器内存集成电路
页数 文件大小 规格书
8页 136K
描述
Synchronous DRAM Module, 2MX64, 8.5ns, CMOS, DIMM-168

SDC2UV6482-100T-S 技术参数

生命周期:Obsolete零件包装代码:DIMM
包装说明:DIMM, DIMM168针数:168
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.02风险等级:5.84
访问模式:DUAL BANK PAGE BURST最长访问时间:8.5 ns
其他特性:AUTO/SELF REFRESH最大时钟频率 (fCLK):100 MHz
I/O 类型:COMMONJESD-30 代码:R-XDMA-N168
内存密度:134217728 bit内存集成电路类型:SYNCHRONOUS DRAM MODULE
内存宽度:64功能数量:1
端口数量:1端子数量:168
字数:2097152 words字数代码:2000000
工作模式:SYNCHRONOUS最高工作温度:70 °C
最低工作温度:组织:2MX64
输出特性:3-STATE封装主体材料:UNSPECIFIED
封装代码:DIMM封装等效代码:DIMM168
封装形状:RECTANGULAR封装形式:MICROELECTRONIC ASSEMBLY
电源:3.3 V认证状态:Not Qualified
刷新周期:2048座面最大高度:31.75 mm
自我刷新:YES最大待机电流:0.016 A
子类别:DRAMs最大压摆率:1.08 mA
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):3.3 V表面贴装:NO
技术:CMOS温度等级:COMMERCIAL
端子形式:NO LEAD端子节距:1.27 mm
端子位置:DUALBase Number Matches:1

SDC2UV6482-100T-S 数据手册

 浏览型号SDC2UV6482-100T-S的Datasheet PDF文件第2页浏览型号SDC2UV6482-100T-S的Datasheet PDF文件第3页浏览型号SDC2UV6482-100T-S的Datasheet PDF文件第4页浏览型号SDC2UV6482-100T-S的Datasheet PDF文件第5页浏览型号SDC2UV6482-100T-S的Datasheet PDF文件第6页浏览型号SDC2UV6482-100T-S的Datasheet PDF文件第7页 
March 1997  
Revision 2.1  
DATA SHEET  
SDC2UV6482(A)-(67/84/100/125)T-S  
16MByte (2M x 64) CMOS  
Synchronous DRAM Module  
General Description  
The SDC2UV6482(A)-(67/84/100/125)T-S is a high performance, 16-megabtye synchronous, dynamic RAM module organized  
as 2M words by 64 bits, in a 168-pin, dual-in-line memory module (DIMM) package.  
The module utilizes eight Fujitsu MB81117822A-(67/84/100/125) PFTN CMOS 2Mx8 synchronous dynamic RAMs in surface  
mount package (TSOP) on an epoxy laminated substrate. Each device is accompanied by a decoupling capacitor for improved  
noise immunity.  
A 256 Byte Serial EEPROM contains the module configuration information.  
Features  
• High Density: 16MByte  
• Cycle Time:  
• Low Power:  
8ns (125MHz), 10ns (100MHz), 12ns (84MHz), 15ns (67MHz)  
Active 4.3W (125MHz), 3.9W (100MHz), 3.6W (84MHz), 3.3W (67MHz)  
• LVTTL-compatible inputs and outputs  
• Separate power and ground planes to improve noise immunity  
• Single power supply of 3.3V±0.3V  
• Height: 1.250 inch (SDC2UV6482)  
1.150 inch (SDC2UV6482A)  
ABSOLUTE MAXIMUM RATINGS  
Item  
Symbol  
Ratings  
-0.5 to +4.6  
10.4  
Unit  
V
Voltage on any pin relative to V  
V
P
SS  
T
Power Dissipation  
W
T
T
Operating Temperature  
Storage Temperate  
0 to +70  
-55 to +125  
±50  
°C  
°C  
mA  
opr  
T
stg  
OS  
I
Short Circuit Output Current  
RECOMMENDED DC OPERATING CONDITIONS  
(TA = 0 to +70 °C)  
Symbol  
Parameter  
Supply Voltage  
Min  
Typ  
Max  
3.6  
0
Unit  
V
V
V
V
3.0  
0
3.3  
V
V
V
V
CC  
SS  
IH  
Ground  
0
-
V
+0.5  
Input High voltage  
Input Low voltage  
2.0  
-0.5  
CC  
-
0.8  
IL  
Fujitsu Microelectronics, Inc.  
1

与SDC2UV6482-100T-S相关器件

型号 品牌 获取价格 描述 数据表
SDC2UV6482C-100T-S FUJITSU

获取价格

Synchronous DRAM Module, 2MX64, 8.5ns, CMOS, PDMA168
SDC2UV6482C-125T-S FUJITSU

获取价格

Synchronous DRAM Module, 2MX64, 7.5ns, CMOS, PDMA168
SDC2UV6482C-67T-S FUJITSU

获取价格

Synchronous DRAM Module, 2MX64, 9ns, CMOS, PDMA168
SDC2UV6482D-125T-S FUJITSU

获取价格

Synchronous DRAM Module, 2MX64, 7.5ns, CMOS, PDMA168
SDC2UV6482D-84T-S FUJITSU

获取价格

Synchronous DRAM Module, 2MX64, 8.5ns, CMOS, PDMA168
SDC2UV7282-67T-S FUJITSU

获取价格

Memory IC, 2MX72, CMOS, PDMA168
SDC2UV7282-84T-S FUJITSU

获取价格

Memory IC, 2MX72, CMOS, PDMA168
SDC2UV7282A-125T-S FUJITSU

获取价格

Memory IC, 2MX72, CMOS, PDMA168
SDC2UV7282A-84T-S FUJITSU

获取价格

Memory IC, 2MX72, CMOS, PDMA168
SDC2UV7282C-125T-S FUJITSU

获取价格

Memory IC, 2MX72, CMOS, PDMA168