S29WS128J/064J
128/64 Megabit (8/4 M x 16-Bit)
CMOS 1.8 Volt-only Simultaneous Read/Write,
Burst Mode Flash Memory
ADVANCE
INFORMATION
Distinctive Characteristics
Architectural Advantages
Performance Charcteristics
Single 1.8 volt read, program and erase (1.65 to
1.95 volt)
Read access times at 104/80/66 MHz
— Burst access times of 7.0/9.1/11.2 ns @ 30 pF at
industrial temperature range
Manufactured on 0.11 µm process technology
— Synchronous latency of 45.5/46/56 ns (at 30 pF)
VersatileIO™ (VIO) Feature
— Asynchronous random access times of 45/45/55 ns
(at 30 pF)
Power dissipation (typical values, CL = 30 pF)
— Burst Mode Read: 10 mA @ 80Mhz
— Simultaneous Operation: 25 mA @ 80Mhz
— Program/Erase: 15 mA
— Device generates data output voltages and tolerates
data input voltages as determined by the voltage on
the VIO pin
— 1.8V compatible I/O signals (1.65-1.95 V)
— 1.5V compatible I/O signals (1.35-1.70 V)
Simultaneous Read/Write operation
— Standby mode: 0.2 µA
— Data can be continuously read from one bank while
executing erase/program functions in other bank
— Zero latency between read and write operations
— Four bank architecture: WS128J: 16Mb/48Mb/48Mb/
16Mb, WS064J: 8Mb/24Mb/24Mb/8Mb
Hardware Features
Handshaking feature available
— Provides host system with minimum possible latency
by monitoring RDY
Programable Burst Interface
Hardware reset input (RESET#)
— Hardware method to reset the device for reading
array data
— 2 Modes of Burst Read Operation
— Linear Burst: 8, 16, and 32 words with wrap-around
— Continuous Sequential Burst
WP# input
SecSi™ (Secured Silicon) Sector region
— 128 words accessible through a command sequence,
64words for the Factory SecSi™ Sector and 64words
for the Customer SecSi™ Sector.
Sector Architecture
4 Kword x 16 boot sectors, eight at the top of the address
range, and eight at the bottom of the address range
— Write protect (WP#) function allows protection of
four outermost boot sectors, regardless of sector
protect status
Persistent Sector Protection
— A command sector protection method to lock
combinations of individual sectors and sector groups
to prevent program or erase operations within that
sector
— WS128J: 4 Kword X 16, 32 Kword x 254 sectors
Bank A : 4 Kword x 8, 32 Kword x 31 sectors
— Sectors can be locked and unlocked in-system at VCC
level
Bank B : 32 Kword x 96 sectors
Bank C : 32 Kword x 96 sectors
Password Sector Protection
— A sophisticated sector protection method to lock
combinations of individual sectors and sector groups
to prevent program or erase operations within that
sector using a user-defined 64-bit password
Bank D : 4 Kword x 8, 32 Kword x 31 sectors
— WS064J: 4 Kword x 16, 32 Kword x 126 sectors.
Bank A : 4 Kword x 8, 32 Kword x 15 sectors
Bank B : 32 Kword x 48 sectors
ACC input: Acceleration function reduces
programming time; all sectors locked when ACC =
VIL
Bank C : 32 Kword x 48 sectors
Bank D : 4 Kword x 8, 32 Kword x 15 sectors
CMOS compatible inputs, CMOS compatible outputs
Low VCC write inhibit
WS128J : 84-ball (8 mm x 11.6 mm) FBGA package,
WS064J : 80-ball (7 mm x 9 mm) FBGA package
Cyclling Endurance : 1,000,000 cycles per sector
typical
Data retention : 20-years typical
Publication Number WS128J/064J_00 Revision A Amendment 1 Issue Date October 6, 2004
This document contains information on a product under development at Spansion, LLC. The information is intended to help you evaluate this product. Do not design in
this product without contacting the factory. Spansion reserves the right to change or discontinue work on this proposed product without notice.