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S1M8823 PDF预览

S1M8823

更新时间: 2022-11-24 21:44:57
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三星 - SAMSUNG /
页数 文件大小 规格书
22页 415K
描述
INTERGER RF/IF DUAL PLL

S1M8823 数据手册

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INTERGER RF/IF DUAL PLL  
S1M8821/22/23  
PIN DESCRIPTION (Continued)  
Pin No  
(20TSSOP) (24QFN)  
Pin No  
Symbol  
I / O  
Description  
15  
17  
finIF  
I
The complementary input of the IF prescaler. A bypass  
capacitor must be placed as close as possible to this pin and  
be connected directly to the ground plane. The bypass  
capacitor is optional with some loss of sensitivity.  
16  
17  
18  
18  
19  
20  
finIF  
GND  
I
-
IF prescaler input. The signal comes from the external VCO.  
Ground for IF digital blocks.  
CPoIF  
O
Internal IF charge pump output for connection to an external  
loop filter whose filtered output drives an external VCO.  
-
21  
22  
23  
-
N/C  
No connection.  
19  
20  
Vp2  
VDD2  
-
-
Power supply voltage input for IF charge pump( VDD2)  
Power supply voltage input for the IF PLL part. VDD1 must  
equal VDD2. In order to reject supply noise, bypass capacitors  
must be placed as close as possible to this pin and be  
connected directly to the ground plane.  
7

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