OVERCURRENT MONITORING IC FOR MULTI-SERIAL-CELL PACK
S-8239A Series
Rev.1.5_00
Electrical Characteristics
1. Ta = +25°C
Table 5
(Ta = +25°C unless otherwise specified)
Test
Condition Circuit
Test
Item
Symbol
Condition
Min.
Typ. Max. Unit
Detection Voltage
VDIOV1
− 0.015
VDIOV2
VDIOV1
+ 0.015
VDIOV2
Overcurrent 1 detection voltage VDIOV1
Overcurrent 2 detection voltage*1 VDIOV2
Overcurrent 3 detection voltage VDIOV3
VDIOV1
V
V
1
1
1
1
−
−
VDIOV2
− 0.100
+ 0.100
With overcurrent 3 detection
function
0.90
1.90
1.20
2.00
1.50
2.10
V
V
1
1
1
1
UVLO detection voltage
Release Voltage
VUVLO
−
Overcurrent release voltage
VRIOV VDD criteria, VDD = 3.5 V
0.7
1.5
1.2
1.5
8
V
V
1
1
Input Voltage, Operation Voltage
Operation voltage between
VDD pin and VSS pin
VDSOP Output logic is determined*2
−
−
−
Current Consumption
Current consumption during
normal operation
Current consumption during
UVLO operation
IOPE
VDD = 3.5 V, VVM = 0 V
VDD = VVM = 1.5 V
1.0
0.7
3.5
3.0
7.0
6.0
2
2
2
2
μA
μA
IUVLO
Internal Resistance
Internal resistance between
VM pin and VSS pin
Output Resistance (Active "L")
DO pin resistance "L"
RVMS
RDOL
RDOL
VDD = VVM = 3.5 V
210
2.5
2.5
300
5
390
10
3
4
4
3
4
4
kΩ
kΩ
kΩ
VDD = VVINI = 3.5 V, VDO = 0.5 V
Output Resistance (Active "H")
VDD = 3.5 V, VVINI = 0 V
DO pin resistance "L"
5
10
VDO = 0.5 V
Delay Time
tDIOV1
× 0.6
tDIOV2
× 0.6
tDIOV1
× 1.4
tDIOV2
× 1.4
Overcurrent 1 detection delay
time
tDlOV1
tDlOV2
−
−
tDIOV1
tDIOV2
ms
ms
5
5
5
5
Overcurrent 2 detection delay
time
Overcurrent 3 detection delay
time
With overcurrent 3 detection
function
tDlOV3
tUVLO
168
280
392
μs
5
5
5
5
UVLO detection delay time
−
2.94
4.90
6.86
s
*1. Even if overcurrent 1 detection voltage and overcurrent 2 detection voltage are in the same range, VDIOV1 is lower than
VDIOV2
.
*2. It indicates that DO pin output logic is determined.
6