OVERCURRENT MONITORING IC FOR MULTI-SERIAL-CELL PACK
S-8239A Series
Rev.1.4_03
2. Ta = −40°C to +85°C*1
Table 6
Condition
(Ta = −40°C to +85°C*1 unless otherwise specified)
Test
Test
Item
Symbol
Min.
Typ. Max.
Unit
Condition Circuit
Detection Voltage
VDIOV1
− 0.021
VDIOV2
VDIOV1
+ 0.021
VDIOV2
Overcurrent 1 detection voltage VDIOV1
Overcurrent 2 detection voltage*2 VDIOV2
Overcurrent 3 detection voltage VDIOV3
VDIOV1
V
V
1
1
1
1
−
−
VDIOV2
− 0.130
+ 0.130
Overcurrent 3 detection function
"available"
0.70
1.85
1.20
2.00
1.70
2.15
V
V
1
1
1
1
UVLO detection voltage
Release Voltage
VUVLO
−
Overcurrent release voltage
VRIOV
VDD criteria, VDD = 3.5 V
0.5
1.5
1.2
1.7
8
V
V
1
1
Input Voltage, Operation Voltage
Operation voltage between
VDD pin and VSS pin
VDSOP
Output logic is determined*3
−
−
−
Current Consumption
Current consumption during
normal operation
Current consumption during
UVLO operation
IOPE
VDD = 3.5 V, VVM = 0 V
VDD = VVM = 1.5 V
0.7
0.5
3.5
3.0
8.0
7.0
2
2
2
2
μA
μA
IUVLO
Internal Resistance
Internal resistance between
VM pin and VSS pin
Output Resistance (Active "L")
DO pin resistance "L"
RVMS
RDOL
RDOL
VDD = VVM = 3.5 V
150
1.2
1.2
300
5
450
15
3
4
4
3
4
4
kΩ
kΩ
kΩ
VDD = VVINI = 3.5 V, VDO = 0.5 V
Output Resistance (Active "H")
V
V
DD = 3.5 V, VVINI = 0 V
DO = 0.5 V
DO pin resistance "L"
5
15
Delay Time
tDIOV1
× 0.2
tDIOV2
× 0.2
tDIOV1
× 1.8
tDIOV2
× 1.8
Overcurrent 1 detection delay
time
tDlOV1
tDlOV2
−
−
tDIOV1
tDIOV2
ms
ms
5
5
5
5
Overcurrent 2 detection delay
time
Overcurrent 3 detection delay
time
Overcurrent 3 detection function
"available"
tDlOV3
tUVLO
56
280
504
μs
5
5
5
5
UVLO detection delay time
−
0.98
4.90
8.82
s
*1. Since products are not screened at high and low temperatures, the specification for this temperature range is
guaranteed by design, not tested in production.
*2. Even if overcurrent 1 detection voltage and overcurrent 2 detection voltage are in the same range, VDIOV1 is lower than
VDIOV2
.
*3. It indicates that DO pin output logic is determined.
7