Datasheet > RT4832A

RT4832A

更新时间： 2024-02-09 03:31:00

品牌	Logo	应用领域
立锜 - RICHTEK		集成电源管理电路
页数	文件大小	规格书
26页	1666K
描述
Sub PMIC with Dual-Output Boost Converter

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技术参数
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RT4832A 技术参数

Status：	Active	Vin (min) (V)：	2.5
Vin (max) (V)：	5.5	Number of Channels：	3
Number of Buck Converters：	0	Number of Boost Converters：	3
Number of Negative Outputs：	1	Number of LED Drivers：	1
Number of LDO Regulators：	1	Features：	Enable Input;OCP;OVP;SCP
Package Type：	WL-CSP2.24x2.64-30(BSC)	Datasheet：	https://datasheet5.oss-cn-shanghai.aliyuncs.com/datasheets/richtek/RT4832A/DS4832A-00.pdf

RT4832A 数据手册

RT4832A

be triggered and then the LED driver will be shut down.

The OTP hysteresis is 15C. Once the junction

temperature reduces below the over temperature

protection threshold by 25C, the IC will enter normal

operation again.

4.0

3.6

3.2

2.8

2.4

2.0

1.6

1.2

0.8

0.4

0.0

Four-Layer PCB

Thermal Considerations

The junction temperature should never exceed the

absolute maximum junction temperature T_J(MAX), listed

under Absolute Maximum Ratings, to avoid permanent

damage to the device. The maximum allowable power

dissipation depends on the thermal resistance of the IC

package, the PCB layout, the rate of surrounding

airflow, and the difference between the junction and

ambient temperatures. The maximum power

dissipation can be calculated using the following

formula :

100

125

Ambient Temperature (°C)

Figure 6. Derating Curve of Maximum Power

Dissipation

Layout Considerations

P_D(MAX)= (T_J(MAX)- T_A) / _JA

For high frequency switching power supplies, the PCB

layout is important to get good regulation, high

efficiency and stability. The following descriptions are

the guidelines for better PCB layout.

where T_J(MAX)is the maximum junction temperature,

T_Ais the ambient temperature, and _JAis the

junction-to-ambient thermal resistance.

For continuous operation, the maximum operating

junction temperature indicated under Recommended

Operating Conditions is 125°C. The junction-to-ambient

thermal resistance, _JA, is highly package dependent.

For a WL-CSP-30B 2.24x2.64 (BSC) package, the

thermal resistance, _JA, is 31.7°C/W on a standard

JEDEC 51-7 high effective-thermal-conductivity

four-layer test board. The maximum power dissipation

at TA = 25°C can be calculated as below :

 For good regulation, place the power components

as close to chip as possible. The traces should be

wide and short enough especially for the

high-current loop.

 Minimize the size of the LX node and route on the

top layer only.

 Place the capacitor CIN as close to VIN pin as

possible.

P_D(MAX)= (125°C - 25°C) / (31.7°C/W) = 3.15W for a

WL-CSP-30B 2.24x2.64 (BSC) package.

 Place the CPOS, CCPOUT capacitor as close to

the output pins as possible. Also place the charge

pump flying capacitor close to the RT4832A.

 Place the capacitor CFLED as close to FLEDOUT

pin as possible. Connect the Flash LED cathode

directly to the FLEDGND pin of the RT4832A.

 Route the LED return with a dedicated path and

keep the LED1 and LED2 path short and close to

RT4832A for the good LED current performance.

The maximum power dissipation depends on the

operating ambient temperature for the fixed T_J(MAX)

and the thermal resistance, _JA. The derating curves in

Figure 6 allows the designer to see the effect of rising

ambient temperature on the maximum power

dissipation.

is a registered trademark of Richtek Technology Corporation.

DS4832A-00 January 2017

www.richtek.com

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