R5106N Series
Compact Watchdog Timer Equipped with Inhibit Pin with VD
The R5106N Series are CMOS-based system power ICs with a voltage detector (VD) and watchdog timer (WDT) integrated in a single
chip. R5106N monitors the power system of devices equipped with microprocessors and prevents system runaway with a reset
signal when a malfunction occurs. The output delay time of the VD and watchdog timeout period/reset time can be adjusted high
accuracy with an external capacitor. The R5106N is equipped with the function that inhibits clock monitoring of the WDT (INH).
FEATURES
• Supply Current (ISS) ························Typ. 11μA (VDD=-VDET+0.5V,
Clock pulse input)
• Operating Voltage (VDD)··················0.9V to 6.0V
(VD Section)
• Output Delay Time (tPLH)·················Typ. 370ms (CT=0.1μF)
<
• Output Delay Time Accuracy··········± 16% (-40°C Topt 105°C)
=
=
(WDT Section)
• Watchdog Timeout Period (tWD)······Typ. 310ms (CT=0.1μF)
•
•
•
Detector Threshold Range (-VDET
Detector Threshold Accuracy ··········± 1%
Temp. coeff. of Detector Threshold ···Typ. ± 100ppm/°C
)
···1.5V to 5.5V (internally fixed)
• Reset Hold Time of WDT (tWR) ·······Typ. 34ms (CT=0.1μF)
<
•
Watchdog Timeout Period Accuracy ····± 33% (-40°C Topt 105°C)
=
=
• Able to stop watchdog timer···········Inhibit (INH) Pin
• Package ·········································SOT-23-6
°
°
°
(The above shows specification at Topt=25 C. Design assurance value at -40 C
Topt
105 C is also available. For details, please refer to the datasheet.)
=
=
BLOCK DIAGRAMS
TYPICAL APPLICATION
R5106Nxx1A
(Nch. open drain output)
R5106Nxx1C
(CMOS output)
Power Supply
Microprocessor
VDD
3
3
6
VDD
VDD
SW1
SW1
SW2
R
3
2
RESETB
R5106Nxx1A
4
1
VDD
RESET
I/O
Vref2
Vref1
Vref2
Vref1
5
1
5
1
GND
SCK
GND
SCK
6
4
CT
CT
Series
SCK
SW2
WATCHDOG
TIMER
CLOCK
DETECTOR
WATCHDOG
TIMER
CLOCK
DETECTOR
SW
INH
CT
6
GND
5
CT
RESETB
RESETB
4
INH
INH
2
2
SELECTION GUIDE
.
xx.
:
Specify the detector threshold within the range 1.5V (
in 0.1V steps.
.
15
.
) to 5.5V (
.
55
.
)
Package
Quantity per Reel
Part No.
SOT-23-6
3,000 pcs
R5106N
.
xx.
1.
∗-TR-F
: Select the output type from (
.
A
.
) Nch. open drain or (
.
C
.
) CMOS.
.
∗
PACKAGE (Top View)
TIMING CHART
SOT-23-6
6
5
4
+VDET
DD
V
-VDET
VINH
1
2
3
tWD
tPLH
tWDI
V
V
ref2H
1
2
3
4
5
SCK
INH
VDD
Watchdog timer clock input pin
Inhibit pin
Power supply pin
V
CT
ref2L
RESETB Output pin for Reset "L" signal
GND
tPHL
Ground pin
VSCK
Ext. Cap. pin for setting reset and
watchdog timeout period of WDT
and output delay time of VD
6
CT
tPLH
tWR
VRESETB
APPLICATION
∗tPHL : Output delay time
∗tWDI : tWD/10 (SCK pulses input during this period are ignored.)
• Monitoring of the power system of devices equipped with microprocessors
No.EK-169-091101
CMOS Microprocessor Supervisory