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QS5917T-132TQG PDF预览

QS5917T-132TQG

更新时间: 2024-01-11 07:25:35
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艾迪悌 - IDT 时钟驱动器逻辑集成电路LTE
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7页 63K
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QS5917T-132TQG 数据手册

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LOW SKEW CMOS PLL  
CLOCK DRIVER WITH  
QS5917T  
INTEGRATED LOOP FILTER  
FEATURES:  
DESCRIPTION  
• 5V operation  
The QS5917T Clock Driver uses an internal phase locked loop (PLL)  
to lock low skew outputs to one of two reference clock inputs. Eight  
outputs are available: Q0-Q4, 2xQ, Q/2, Q5. Careful layout and design  
insures < 500ps skew between the Q0-Q4, and Q/2 outputs. The QS5917T  
includes an internal RC filter which provides excellent jitter characteris-  
tics and eliminates the need for external components. In addition, TTL  
level outputs reduce clock signal noise. Various combinations of feed-  
back and a divide-by-2 in the VCO path allow applications to be custom-  
ized for linear VCO operation over a wide range of input SYNC fre-  
quencies. The VCO can also be disabled by the PLL_EN signal to allow  
low frequency or DC testing. The LOCK output asserts to indicate when  
phase lock has been achieved. The QS5917T is designed for use in  
high-performance workstations, multi-board computers, networking hardware,  
and mainframe systems. Several can be used in parallel or scattered  
throughout a system for guaranteed low skew, system-wide clock distri-  
bution networks.  
• 2xQ output, Q/2 output, Q output  
• Outputs tri-state while RST low  
• Internal loop filter RC network  
• Low noise TTL level outputs  
• < 500ps output skew, Q0-Q4  
• PLL disable feature for low frequency testing  
• Balanced Drive Outputs ± 24mA  
• 132MHz maximum frequency (2xQ output)  
• Functional equivalent to Motorola MC88915  
• ESD > 2000V  
• Latch-up > –300mA  
• Available in QSOP and PLCC packages  
For more information on PLL clock driver products, see Application  
Note AN-227.  
FUNCTIONALBLOCKDIAGRAM  
REF_SEL  
FEEDBACK  
PLL_EN  
FREQ_SEL  
LOCK  
0
1
SYNC0  
SYNC1  
0
1
1
0
PHASE  
DETECTOR  
LOOP  
FILTER  
VCO  
/2  
RST  
R
D
R
D
R
D
R
D
R
D
R
D
R
D
Q
Q
Q
Q
Q
Q
Q
Q
Q5  
Q/2  
Q4  
Q3  
Q2  
Q1  
Q0  
2xQ  
TheIDTlogoisaregisteredtrademarkofIntegratedDeviceTechnology,Inc.  
INDUSTRIAL TEMPERATURE RANGE  
JULY 2000  
1
© 2000 Integrated Device Technology, Inc.  
DSC-5227/2  

QS5917T-132TQG 替代型号

型号 品牌 替代类型 描述 数据表
IDTQS5917T-132TJ8 IDT

类似代替

PLL Based Clock Driver, 5917 Series, 7 True Output(s), 1 Inverted Output(s), CMOS, PQCC28,
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功能相似

LOW SKEW CMOS PLL CLOCK DRIVER WITH INTEGRATED LOOP FILTER

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