Datasheet > Q67100-Q727

Q67100-Q727

更新时间： 2024-02-18 11:26:51

品牌	Logo	应用领域
英飞凌 - INFINEON		/
页数	文件大小	规格书
23页	183K
描述
256k x 16-Bit Dynamic RAM

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中文翻译

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数据手册

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Q67100-Q727 数据手册

256k × 16-Bit Dynamic RAM

HYB 514171BJ-50/-60

Advanced Information

• 262 144 words by 16-bit organization

• 0 to 70 °C operating temperature

• Fast access and cycle time

• Standby power dissipation

11 mW standby (TTL)

5.5 mW max. standby (CMOS)

• RAS access time:

50 ns (-50 version)

60 ns (-60 version)

• Output unlatched at cycle end allows

two-dimensional chip selection

• Read, write, read-modify write,

CAS-before-RAS refresh, RAS-only

refresh, hidden-refresh and fast page

mode capability

• CAS access time:

15ns (-50, -60 version)

• Cycle time:

95 ns (-50 version)

110 ns (-60 version)

• 2 CAS / 1 WE control

• All inputs and outputs TTL-compatible

• 512 refresh cycles / 16 ms

• Fast page mode cycle time

35 ns (-50 version)

• Plastic Packages:

40 ns (-60 version)

P-SOJ-40-1 400 mil width

• Single + 5.0 V (± 10 %) supply with a

built-in VBB generator

• Low Power dissipation

max. 1045 mW active (-50 version)

max. 935 mW active (-60 version)

The HYB 514171BJ is a 4 MBit dynamic RAM organized as 262 144 words by 16-bit. The

HYB 514171BJ utilizes CMOS silicon gate process as well as advanced circuit techniques to

provide wide operation margins, both internally and for the system user. Multiplexed address inputs

permit the HYB 514171BJ to be packed in a standard plastic 400 mil wide P-SOJ-40-1 package.

This package size provides high system bit densities and is compatible with commonly used

automatic testing and insertion equipment. System oriented features include single + 5 V (± 10 %)

power supply, direct interfacing with high performance logic device families such as Schottky TTL.

Semiconductor Group

1998-10-01

12 3 4 5 6 7...23

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