Datasheet > PL56037OI

PL56037OI

更新时间： 2025-10-14 10:08:55

品牌	Logo	应用领域
PLL		倍频器
页数	文件大小	规格书
15页	500K
描述
Analog Frequency Multiplier

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PL56037OI 数据手册

Analog Frequency Multiplier

VCXO Family of Products

PRODUCT DESCRIPTION

FEATURES

• Non Phase Locked Loop frequency multiplication

• Input frequency from 30-200 MHz

• Output frequency from 60-800-MHz

• Low Phase noise and jitter (equivalent to fundamental

crystal at the output frequency)

PhaseLink’s Analog Frequency Multiplier^TM(AFMs)

are the industry’s first ‘Balanced Oscillator’ utilizing

analog multiplication of the fundamental frequency

(at double or quadruple frequency), combined with

an attenuation of the fundamental of the reference

crystal, without the use of a phase locked loop, in

CMOS technology.

• Unbeatably low jitter

o RMS phase jitter < 0.25ps (12kHz-20MHz)

o RMS period jitter < 2.5 ps

• Low Phase Noise

PhaseLink’s patent pending PL56X family of AFM

products can achieve up to 800 MHz output

frequency with practically no jitter or phase noise

deterioration. In addition, the low frequency input

crystal requirement makes the AFMs the most

affordable high performance timing source in the

market.

o -142 dBc/Hz @100kHz Offset from 155.52MHz

o -150 dBc/Hz @10MHz Offset from 155.52MHz

• High linearity pull range (typ. 5%)

• +/- 120 PPM pullability VCXO

• Low input frequency eliminates the need for

expensive crystals

• Differential output levels (PECL, LVDS), or single-

ended CMOS

• Single 2.5V or 3.3V +/- 10% power supply

• Optional industrial temperature range (-40°C to

+85°C)

PL560-XX family of products utilize a low-power

CMOS technology and are housed in a 16-pin

(T)SSOP, and 16-pin 3x3 QFN.

• Available in 16-pin (T) SSOP, and 3x3 QFN

Figure 1: 2x AFM Phase Noise at 311.04MHz

47745 Fremont Blvd., Fremont, California 94538 TEL (510) 492-0990, FAX (510) 492-0991 www.phaselink.com Rev. 02/10/05 Page 1

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