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PIC24FJ128GA702-I/MV PDF预览

PIC24FJ128GA702-I/MV

更新时间: 2024-09-21 15:47:59
品牌 Logo 应用领域
美国微芯 - MICROCHIP 时钟外围集成电路
页数 文件大小 规格书
412页 2973K
描述
IC MCU 16-BIT 128KB FLASH 28UQFN

PIC24FJ128GA702-I/MV 技术参数

是否无铅: 不含铅生命周期:Active
包装说明:HVQCCN,Reach Compliance Code:compliant
风险等级:2.17具有ADC:YES
地址总线宽度:位大小:16
最大时钟频率:48 MHzDAC 通道:NO
DMA 通道:YES外部数据总线宽度:
JESD-30 代码:S-PQCC-N28长度:4 mm
I/O 线路数量:22端子数量:28
片上程序ROM宽度:24最高工作温度:85 °C
最低工作温度:-40 °CPWM 通道:YES
封装主体材料:PLASTIC/EPOXY封装代码:HVQCCN
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
ROM可编程性:FLASH筛选级别:TS 16949
座面最大高度:0.55 mm速度:32 MHz
最大供电电压:3.6 V最小供电电压:2 V
标称供电电压:3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:NO LEAD端子节距:0.4 mm
端子位置:QUAD宽度:4 mm
uPs/uCs/外围集成电路类型:MICROCONTROLLER, RISCBase Number Matches:1

PIC24FJ128GA702-I/MV 数据手册

 浏览型号PIC24FJ128GA702-I/MV的Datasheet PDF文件第2页浏览型号PIC24FJ128GA702-I/MV的Datasheet PDF文件第3页浏览型号PIC24FJ128GA702-I/MV的Datasheet PDF文件第4页浏览型号PIC24FJ128GA702-I/MV的Datasheet PDF文件第5页浏览型号PIC24FJ128GA702-I/MV的Datasheet PDF文件第6页浏览型号PIC24FJ128GA702-I/MV的Datasheet PDF文件第7页 
PIC24FJ256GA705 FAMILY  
16-Bit General Purpose Microcontrollers with 256-Kbyte Flash and  
16-Kbyte RAM in Low Pin Count Packages  
High-Performance CPU  
Low-Power Features  
• Modified Harvard Architecture  
• Up to 16 MIPS Operation @ 32 MHz  
• 8 MHz Fast RC Internal Oscillator:  
- 96 MHz PLL option  
• Sleep and Idle modes Selectively Shut Down  
Peripherals and/or Core for Substantial Power  
Reduction and Fast Wake-up  
• Doze mode allows CPU to Run at a Lower Clock  
Speed than Peripherals  
- Multiple clock divide options  
- Fast start-up  
• Alternate Clock modes allow On-the-Fly  
Switching to a Lower Clock Speed for Selective  
Power Reduction  
• 17-Bit x 17-Bit Single-Cycle Hardware  
Fractional/Integer Multiplier  
• 32-Bit by 16-Bit Hardware Divider  
Special Microcontroller Features  
• 16-Bit x 16-Bit Working Register Array  
• C Compiler Optimized Instruction Set Architecture  
• Supply Voltage Range of 2.0V to 3.6V  
• Dual Voltage Regulators:  
• Two Address Generation Units for Separate Read  
and Write Addressing of Data Memory  
- 1.8V core regulator  
- 1.2V regulator for Retention Sleep mode  
• Six-Channel DMA Controller  
• Operating Ambient Temperature Range of  
-40°C to +85°C  
Analog Features  
• ECC Flash Memory (256 Kbytes):  
- Single Error Correction (SEC)  
• Up to 14-Channel, Software Selectable,  
10/12-Bit Analog-to-Digital Converter:  
- Double Error Detection (DED)  
- 12-bit, 200K samples/second conversion rate  
(single Sample-and-Hold)  
- 10,000 erase/write cycle endurance, typical  
- Data retention: 20 years minimum  
- Self-programmable under software control  
• 16-Kbyte SRAM  
- Sleep mode operation  
- Charge pump for operating at lower AVDD  
- Band gap reference input feature  
- Windowed threshold compare feature  
- Auto-scan feature  
• Programmable Reference Clock Output  
• In-Circuit Serial Programming™ (ICSP™) and  
In-Circuit Emulation (ICE) via 2 Pins  
• Three Analog Comparators with Input Multiplexing:  
• JTAG Boundary Scan Support  
- Programmable reference voltage for  
comparators  
• Fail-Safe Clock Monitor Operation:  
- Detects clock failure and switches to on-chip,  
Low-Power RC (LPRC) Oscillator  
• LVD Interrupt Above/Below Programmable  
VLVD Level  
• Power-on Reset (POR), Brown-out Reset (BOR)  
and Oscillator Start-up Timer (OST)  
• Charge Time Measurement Unit (CTMU):  
- Allows measurement of capacitance and time  
- Operational in Sleep  
• Programmable Low-Voltage Detect (LVD)  
• Flexible Watchdog Timer (WDT) with its Own  
RC Oscillator for Reliable Operation  
2016 Microchip Technology Inc.  
DS30010118B-page 1  

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