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PCAL6416AHF PDF预览

PCAL6416AHF

更新时间： 2024-09-24 12:24:23
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
54页 2962K
描述
Low-voltage translating 16-bit I2C-bus/SMBus I/O expander with interrupt output, reset, and configuration registers

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PCAL6416AHF 技术参数

是否Rohs认证： 符合生命周期：Active
包装说明：HWQFN-24Reach Compliance Code：compliant
风险等级：5.72JESD-30 代码：S-PQCC-N24
JESD-609代码：e4长度：4 mm
湿度敏感等级：1I/O 线路数量：16
端口数量：2端子数量：24
最高工作温度：85 °C最低工作温度：-40 °C
封装主体材料：PLASTIC/EPOXY封装代码：HVQCCN
封装形状：SQUARE封装形式：CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：260座面最大高度：0.8 mm
最大供电电压：5.5 V最小供电电压：1.65 V
标称供电电压：1.8 V表面贴装：YES
技术：CMOS温度等级：INDUSTRIAL
端子面层：NICKEL PALLADIUM GOLD端子形式：NO LEAD
端子节距：0.5 mm端子位置：QUAD
处于峰值回流温度下的最长时间：30宽度：4 mm
uPs/uCs/外围集成电路类型：PARALLEL IO PORT, GENERAL PURPOSEBase Number Matches：1

PCAL6416AHF 数据手册

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PCAL6416A  
Low-voltage translating 16-bit I2C-bus/SMBus I/O expander  
with interrupt output, reset, and configuration registers  
Rev. 3 — 24 December 2012  
Product data sheet  
1. General description  
The PCAL6416A is a 16-bit general purpose I/O expander that provides remote I/O  
expansion for most microcontroller families via the I2C-bus interface.  
NXP I/O expanders provide a simple solution when additional I/Os are needed while  
keeping interconnections to a minimum, for example, in battery-powered mobile  
applications for interfacing to sensors, push buttons, keypad, etc. In addition to providing  
a flexible set of GPIOs, it simplifies interconnection of a processor running at one voltage  
level to I/O devices operating at a different (usually higher) voltage level. The PCAL6416A  
has built-in level shifting feature that makes these devices extremely flexible in mixed  
signal environments where communication between incompatible I/O voltages is required.  
Its wide VDD range of 1.65 V to 5.5 V on the dual power rail allows seamless  
communications with next-generation low voltage microprocessors and microcontrollers  
on the interface side (SDA/SCL) and peripherals at a higher voltage on the port side.  
There are two supply voltages for PCAL6416A: VDD(I2C-bus) and VDD(P). VDD(I2C-bus)  
provides the supply voltage for the interface at the master side (for example, a  
microcontroller) and the VDD(P) provides the supply for core circuits and Port P. The  
bidirectional voltage level translation in the PCAL6416A is provided through VDD(I2C-bus)  
DD(I2C-bus) should be connected to the VDD of the external SCL/SDA lines. This indicates  
the VDD level of the I2C-bus to the PCAL6416A, while the voltage level on Port P of the  
PCAL6416A is determined by the VDD(P)  
.
V
.
The PCAL6416A contains the PCA6416A register set of four pairs of 8-bit Configuration,  
Input, Output, and Polarity Inversion registers and additionally, the PCAL6416A has  
Agile I/O, which are additional features specifically designed to enhance the I/O. These  
additional features are: programmable output drive strength, latchable inputs,  
programmable pull-up/pull-down resistors, maskable interrupt, interrupt status register,  
programmable open-drain or push-pull outputs. The PCAL6416A is a pin-to-pin  
replacement to the PCA6416A, however, the PCAL6416A powers up with all I/O interrupts  
masked. This mask default allows for a board bring-up free of spurious interrupts at  
power-up.  
At power-on, the I/Os are configured as inputs. However, the system master can enable  
the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for  
each input or output is kept in the corresponding input or output register. The polarity of  
the Input Port register can be inverted with the Polarity Inversion register, saving external  
logic gates. Programmable pull-up and pull-down resistors eliminate the need for discrete  
components.  
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