Datasheet > PCA9554ABS,115

PCA9554ABS,115

更新时间： 2024-02-02 17:23:03

品牌	Logo	应用领域
恩智浦 - NXP		PC 外围集成电路
页数	文件大小	规格书
35页	592K
描述
PCA9554/PCA9554A - 8-bit I²C-bus and SMBus I/O port with interrupt QFN 16-Pin

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PCA9554ABS,115 技术参数

Source Url Status Check Date：	2013-06-14 00:00:00	生命周期：	Obsolete
零件包装代码：	QFN	包装说明：	HVQCCN,
针数：	16	Reach Compliance Code：	unknown
风险等级：	5.78	JESD-30 代码：	S-PQCC-N16
JESD-609代码：	e4	长度：	4 mm
I/O 线路数量：	8	端口数量：	1
端子数量：	16	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	HVQCCN	封装形状：	SQUARE
封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	座面最大高度：	1 mm
最大供电电压：	5.5 V	最小供电电压：	2.3 V
标称供电电压：	3 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	NICKEL PALLADIUM GOLD	端子形式：	NO LEAD
端子节距：	0.65 mm	端子位置：	QUAD
宽度：	4 mm	uPs/uCs/外围集成电路类型：	PARALLEL IO PORT, GENERAL PURPOSE
Base Number Matches：	1

PCA9554ABS,115 数据手册

PCA9554; PCA9554A

8-bit I²C-bus and SMBus I/O port with interrupt

Rev. 9 — 19 March 2013

Product data sheet

1. General description

The PCA9554 and PCA9554A are 16-pin CMOS devices that provide 8 bits of General

Purpose parallel Input/Output (GPIO) expansion for I²C-bus/SMBus applications and

were developed to enhance the NXP Semiconductors family of I²C-bus I/O expanders.

The improvements include higher drive capability, 5 V I/O tolerance, lower supply current,

individual I/O configuration, 400 kHz clock frequency, and smaller packaging. I/O

expanders provide a simple solution when additional I/O is needed for ACPI power

switches, sensors, push buttons, LEDs, fans, and so on.

The PCA9554/PCA9554A consist of an 8-bit Configuration register (Input or Output

selection); 8-bit Input Port register, 8-bit Output Port register and an 8-bit Polarity

Inversion register (active HIGH or active LOW operation). The system master can enable

the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for

each input or output is kept in the corresponding Input Port or Output Port register. The

polarity of the read register can be inverted with the Polarity Inversion register. All

registers can be read by the system master. Although pin-to-pin and I²C-bus address

compatible with the PCF8574 series, software changes are required due to the

enhancements and are discussed in Application Note AN469.

The PCA9554/PCA9554A open-drain interrupt output is activated when any input state

differs from its corresponding Input Port register state and is used to indicate to the

system master that an input state has changed. The power-on reset sets the registers to

their default values and initializes the device state machine.

Three hardware pins (A0, A1, A2) vary the fixed I²C-bus address and allow up to eight

devices to share the same I²C-bus/SMBus. The PCA9554A is identical to the PCA9554

except that the fixed I²C-bus address is different allowing up to sixteen of these devices

(eight of each) on the same I²C-bus/SMBus.

2. Features and benefits

 Operating power supply voltage range of 2.3 V to 5.5 V

 5 V tolerant I/Os

 Polarity Inversion register

 Active LOW interrupt output

 Low standby current

 Noise filter on SCL/SDA inputs

 No glitch on power-up

 Internal power-on reset

 8 I/O pins which default to 8 inputs

 0 Hz to 400 kHz clock frequency

12 3 4 5 6 7...35

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