5秒后页面跳转
PCA9538DGVRG4 PDF预览

PCA9538DGVRG4

更新时间: 2024-01-03 17:41:34
品牌 Logo 应用领域
德州仪器 - TI 并行IO端口微控制器和处理器外围集成电路电视光电二极管输出元件
页数 文件大小 规格书
29页 480K
描述
REMOTE 8-BIT I2C AND SMBus LOW-POWER I/O EXPANDER WITH INTERRUPT OUTPUT, RESET, AND CONFIGURATION REGISTERS

PCA9538DGVRG4 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:GREEN, PLASTIC, TVSOP-16针数:16
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.58
Is Samacsys:NJESD-30 代码:R-PDSO-G16
JESD-609代码:e4长度:3.6 mm
湿度敏感等级:1位数:8
I/O 线路数量:8端口数量:1
端子数量:16最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP16,.25,16
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):260电源:2.5/5 V
认证状态:Not Qualified座面最大高度:1.2 mm
子类别:Parallel IO Ports最大供电电压:5.5 V
最小供电电压:2.3 V标称供电电压:2.5 V
表面贴装:YES技术:CMOS
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.4 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:4.4 mmuPs/uCs/外围集成电路类型:PARALLEL IO PORT, GENERAL PURPOSE
Base Number Matches:1

PCA9538DGVRG4 数据手册

 浏览型号PCA9538DGVRG4的Datasheet PDF文件第3页浏览型号PCA9538DGVRG4的Datasheet PDF文件第4页浏览型号PCA9538DGVRG4的Datasheet PDF文件第5页浏览型号PCA9538DGVRG4的Datasheet PDF文件第7页浏览型号PCA9538DGVRG4的Datasheet PDF文件第8页浏览型号PCA9538DGVRG4的Datasheet PDF文件第9页 
PCA9538  
REMOTE 8-BIT I2C AND SMBus LOW-POWER I/O EXPANDER  
WITH INTERRUPT OUTPUT, RESET, AND CONFIGURATION REGISTERS  
www.ti.com  
SCPS126DSEPTEMBER 2006REVISED MARCH 2007  
Interface Definition Table  
BIT  
BYTE  
7 (MSB)  
6
H
5
H
4
L
3
L
2
1
0 (LSB)  
R/W  
I2C slave address  
Px I/O data bus  
H
A1  
P2  
A0  
P1  
P7  
P6  
P5  
P4  
P3  
P0  
Device Address  
Figure 4 shows the address byte of the PCA9538.  
Slave Address  
1
1
1
0
0
A1 A0 R/W  
Hardware  
Selectable  
Fixed  
Figure 4. PCA9538 Address  
Address Reference Table  
INPUTS  
I2C BUS SLAVE ADDRESS  
A1  
L
A0  
L
112 (decimal), 70 (hexadecimal)  
113 (decimal), 71 (hexadecimal)  
114 (decimal), 72 (hexadecimal)  
115 (decimal), 73 (hexadecimal)  
L
H
L
H
H
H
The last bit of the slave address defines the operation (read or write) to be performed. When it is high (1), a read  
is selected while a low (0) selects a write operation.  
Control Register and Command Byte  
Following the successful Acknowledgment of the address byte, the bus master sends a command byte which is  
stored in the control register in the PCA9538 (see Figure 5). Two bits of this command byte state the operation  
(read or write) and the internal register (input, output, polarity inversion or configuration) that will be affected.  
This register can be written or read through the I2C bus. The command byte is sent only during a write  
transmission.  
Once a command byte has been sent, the register that was addressed continues to be accessed by reads until  
a new command byte has been sent.  
0
0
0
0
0
0
B1 B0  
Figure 5. Control Register Bits  
Command Byte Table  
CONTROL REGISTER BITS  
COMMAND BYTE  
(HEX)  
REGISTER  
PROTOCOL  
POWER-UP DEFAULT  
B1  
0
B0  
0
0x00  
0x01  
0x02  
0x03  
Input Port  
Output Port  
Read byte  
XXXX XXXX  
1111 1111  
0000 0000  
1111 1111  
0
1
Read/write byte  
Read/write byte  
Read/write byte  
1
0
Polarity Inversion  
Configuration  
1
1
6
Submit Documentation Feedback  
 
 

与PCA9538DGVRG4相关器件

型号 品牌 描述 获取价格 数据表
PCA9538DW TI REMOTE 8-BIT I2C AND SMBus LOW-POWER I/O EXPANDER WITH INTERRUPT OUTPUT, RESET, AND CONFIG

获取价格

PCA9538DWG4 TI REMOTE 8-BIT I2C AND SMBus LOW-POWER I/O EXPANDER WITH INTERRUPT OUTPUT, RESET, AND CONFIG

获取价格

PCA9538DWR TI REMOTE 8-BIT I2C AND SMBus LOW-POWER I/O EXPANDER WITH INTERRUPT OUTPUT, RESET, AND CONFIG

获取价格

PCA9538DWRG4 TI REMOTE 8-BIT I2C AND SMBus LOW-POWER I/O EXPANDER WITH INTERRUPT OUTPUT, RESET, AND CONFIG

获取价格

PCA9538PW TI REMOTE 8-BIT I2C AND SMBus LOW-POWER I/O EXPANDER WITH INTERRUPT OUTPUT, RESET, AND CONFIG

获取价格

PCA9538PW NXP 8-bit I2C and SMBus low power I/O port with interrupt and reset

获取价格