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PCA9538DWRG4 PDF预览

PCA9538DWRG4

更新时间: 2024-02-23 22:13:24
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德州仪器 - TI 输出元件
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31页 609K
描述
REMOTE 8-BIT I2C AND SMBus LOW-POWER I/O EXPANDER WITH INTERRUPT OUTPUT, RESET, AND CONFIGURATION REGISTERS

PCA9538DWRG4 数据手册

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PCA9538  
www.ti.com ................................................................................................................................................ SCPS126ESEPTEMBER 2006REVISED JUNE 2008  
REMOTE 8-BIT I2C AND SMBus LOW-POWER I/O EXPANDER  
WITH INTERRUPT OUTPUT, RESET, AND CONFIGURATION REGISTERS  
1
FEATURES  
Low Standby Current Consumption of  
1 µA Max  
Power-Up With All Channels Configured as  
Inputs  
I2C to Parallel Port Expander  
Open-Drain Active-Low Interrupt Output  
Active-Low Reset Input  
No Glitch on Power Up  
Noise Filter on SCL/SDA Inputs  
Latched Outputs With High-Current Drive  
Maximum Capability for Directly Driving LEDs  
Operating Power-Supply Voltage Range of  
2.3 V to 5.5 V  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
5-V Tolerant I/O Ports  
400-kHz Fast I2C Bus  
ESD Protection Exceeds JESD 22  
2000-V Human-Body Model (A114-A)  
200-V Machine Model (A115-A)  
Two Hardware Address Pins Allow up to Four  
Devices on the I2C/SMBus  
Input/Output Configuration Register  
Polarity Inversion Register  
1000-V Charged-Device Model (C101)  
RGV PACKAGE  
(TOP VIEW)  
DB, DBQ, DGV, DW, OR PW PACKAGE  
(TOP VIEW)  
RGT PACKAGE  
(TOP VIEW)  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
A0  
A1  
VCC  
SDA  
SCL  
INT  
P7  
16 15 14 13  
16 15 14 13  
1
12  
RESET  
P0  
SCL  
INT  
P7  
1
12  
RESET  
SCL  
INT  
P7  
RESET  
P0  
2
3
4
11  
10  
9
2
3
11  
10  
P0  
P1  
P2  
P1  
P1  
P2  
P3  
4
9
P6  
P2  
P6  
P6  
P5  
5
6
7
8
5
6
7
8
GND  
P4  
DESCRIPTION/ORDERING INFORMATION  
This 8-bit I/O expander for the two-line bidirectional bus (I2C) is designed for 2.3-V to 5.5-V VCC operation. It  
provides general-purpose remote I/O expansion for most microcontroller families via the I2C interface [serial clock  
(SCL), serial data (SDA)].  
The PCA9538 consists of one 8-bit Configuration (input or output selection), Input Port, Output Port, and Polarity  
Inversion (active high or active low) registers. At power on, the I/Os are configured as inputs. However, the  
system master can enable the I/Os as either inputs or outputs by writing to the I/O configuration bits. The data for  
each input or output is kept in the corresponding Input Port or Output Port register. The polarity of the Input Port  
register can be inverted with the Polarity Inversion register. All registers can be read by the system master.  
The system master can reset the PCA9538 in the event of a timeout or other improper operation by asserting a  
low in the RESET input. The power-on reset puts the registers in their default state and initializes the I2C/SMBus  
state machine. The RESET pin causes the same reset/initialization to occur without powering down the part.  
The PCA9538 open-drain interrupt (INT) output is activated when any input state differs from its corresponding  
Input Port register state and is used to indicate to the system master that an input state has changed.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
UNLESS OTHERWISE NOTED this document contains  
Copyright © 2006–2008, Texas Instruments Incorporated  
PRODUCTION DATA information current as of publication date.  
Products conform to specifications per the terms of Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  

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