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PCA9536DP/DG,118 PDF预览

PCA9536DP/DG,118

更新时间: 2024-02-29 22:39:49
品牌 Logo 应用领域
恩智浦 - NXP PC光电二极管外围集成电路
页数 文件大小 规格书
22页 183K
描述
PCA9536 - 4-bit I2C-bus and SMBus I/O port TSSOP 8-Pin

PCA9536DP/DG,118 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:TSSOP包装说明:TSSOP, TSSOP8,.19
针数:8Reach Compliance Code:unknown
HTS代码:8542.39.00.01风险等级:7.81
JESD-30 代码:S-PDSO-G8JESD-609代码:e4
长度:3 mm湿度敏感等级:1
位数:4I/O 线路数量:4
端口数量:1端子数量:8
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装等效代码:TSSOP8,.19封装形状:SQUARE
封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH峰值回流温度(摄氏度):260
电源:2.5/5 V认证状态:Not Qualified
座面最大高度:1.1 mm子类别:Parallel IO Port
最大供电电压:5.5 V最小供电电压:2.3 V
标称供电电压:3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:NICKEL PALLADIUM GOLD端子形式:GULL WING
端子节距:0.65 mm端子位置:DUAL
处于峰值回流温度下的最长时间:30宽度:3 mm
uPs/uCs/外围集成电路类型:PARALLEL IO PORT, GENERAL PURPOSEBase Number Matches:1

PCA9536DP/DG,118 数据手册

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PCA9536  
NXP Semiconductors  
4-bit I2C-bus and SMBus I/O port  
6. Functional description  
Refer to Figure 1 “Block diagram of PCA9536”.  
6.1 Registers  
6.1.1 Command byte  
Table 3.  
Command byte  
Command  
Protocol  
Function  
0
1
2
3
read byte  
Input Port register  
Output Port register  
read/write byte  
read/write byte  
read/write byte  
Polarity Inversion register  
Configuration register  
The command byte is the first byte to follow the address byte during a write transmission.  
It is used as a pointer to determine which of the following registers will be written or read.  
6.1.2 Register 0 - Input Port register  
This register is a read-only port. It reflects the incoming logic levels of the pins, regardless  
of whether the pin is defined as an input or an output by Register 3. Writes to this register  
have no effect.  
The default ‘X’ is determined by the externally applied logic level, normally logic 1 when  
no external signal externally applied because of the internal pull-up resistors.  
Table 4.  
Register 0 - Input Port register bit description  
Legend: * default value  
Bit  
7
Symbol  
Access  
Value  
1*  
1*  
1*  
1*  
X
Description  
I7  
I6  
I5  
I4  
I3  
I2  
I1  
I0  
read only  
read only  
read only  
read only  
read only  
read only  
read only  
read only  
not used  
6
5
4
3
determined by externally applied logic level  
2
X
1
X
0
X
PCA9536_5  
© NXP B.V. 2010. All rights reserved.  
Product data sheet  
Rev. 05 — 25 January 2010  
4 of 22  
 
 
 
 

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