Datasheet > 微控制器和处理器 > 并行 IO 端口> PCA9534PW

PCA9534PW

更新时间： 2024-02-05 14:22:13

品牌	Logo	应用领域
德州仪器 - TI		并行IO端口微控制器和处理器外围集成电路光电二极管输出元件
页数	文件大小	规格书
32页	658K
描述
REMOTE 8-BIT I2C AND SMBus LOW-POWER I/O EXPANDER WITH INTERRUPT OUTPUT AND CONFIGURATION REGISTERS

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技术参数
数据手册

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PCA9534PW 技术参数

是否无铅：	不含铅	是否Rohs认证：	符合
生命周期：	Active	零件包装代码：	QFN
包装说明：	QFN-16	针数：	16
Reach Compliance Code：	compliant	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	Factory Lead Time：	1 week
风险等级：	0.82	Is Samacsys：	N
最大时钟频率：	0.4 MHz	JESD-30 代码：	S-PQCC-N16
JESD-609代码：	e4	长度：	4 mm
湿度敏感等级：	2	位数：	8
I/O 线路数量：	8	端口数量：	1
端子数量：	16	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	PLASTIC/EPOXY
封装代码：	HVQCCN	封装等效代码：	LCC16,.16SQ,25
封装形状：	SQUARE	封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
峰值回流温度（摄氏度）：	260	电源：	2.5/5 V
认证状态：	Not Qualified	座面最大高度：	1 mm
子类别：	Parallel IO Ports	最大压摆率：	0.175 mA
最大供电电压：	5.5 V	最小供电电压：	2.3 V
标称供电电压：	5 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子面层：	Nickel/Palladium/Gold (Ni/Pd/Au)	端子形式：	NO LEAD
端子节距：	0.65 mm	端子位置：	QUAD
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	4 mm
uPs/uCs/外围集成电路类型：	PARALLEL IO PORT, GENERAL PURPOSE	Base Number Matches：	1

PCA9534PW 数据手册

PCA9534

REMOTE 8-BIT I²C AND SMBus LOW-POWER I/O EXPANDER

WITH INTERRUPT OUTPUT AND CONFIGURATION REGISTERS

www.ti.com

SCPS124B–SEPTEMBER 2006–REVISED FEBRUARY 2007

Any number of data bytes can be transferred from the transmitter to receiver between the start and the stop

conditions. Each byte of eight bits is followed by one ACK bit. The transmitter must release the SDA line before

the receiver can send an ACK bit. The device that acknowledges must pull down the SDA line during the ACK

clock pulse so that the SDA line is stable low during the high pulse of the ACK-related clock period (see

Figure 3). When a slave receiver is addressed, it must generate an ACK after each byte is received. Similarly,

the master must generate an ACK after each byte that it receives from the slave transmitter. Setup and hold

times must be met to ensure proper operation.

A master receiver will signal an end of data to the slave transmitter by not generating an acknowledge (NACK)

after the last byte has been clocked out of the slave. This is done by the master receiver by holding the SDA line

high. In this event, the transmitter must release the data line to enable the master to generate a stop condition.

SDA

SCL

Start Condition

Stop Condition

Figure 1. Definition of Start and Stop Conditions

SDA

SCL

Data Line

Stable;

Data Valid

Change

of Data

Allowed

Figure 2. Bit Transfer

Data Output

by Transmitter

NACK

Data Output

by Receiver

ACK

SCL From

Master

Start

Clock Pulse for

Condition

Acknowledgment

Figure 3. Acknowledgment on I²C Bus

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1 2 3 456 7 8...32

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与PCA9534PW相关器件

型号	品牌	描述	获取价格	数据表
PCA9534PW,112	NXP	PCA9534 - 8-bit I2C-bus and SMBus low power I/O port with interrupt TSSOP 16-Pin	获取价格
PCA9534PW/DG,118	NXP	PCA9534 - 8-bit I2C-bus and SMBus low power I/O port with interrupt TSSOP 16-Pin	获取价格
PCA9534PWG4	TI	REMOTE 8-BIT I2C AND SMBus LOW-POWER I/O EXPANDER WITH INTERRUPT OUTPUT AND CONFIGURATION	获取价格
PCA9534PWR	TI	REMOTE 8-BIT I2C AND SMBus LOW-POWER I/O EXPANDER WITH INTERRUPT OUTPUT AND CONFIGURATION	获取价格
PCA9534PWRG4	TI	REMOTE 8-BIT I2C AND SMBus LOW-POWER I/O EXPANDER WITH INTERRUPT OUTPUT AND CONFIGURATION	获取价格
PCA9534PWT	TI	IC 8 I/O, PIA-GENERAL PURPOSE, PDSO16, PLASTIC, TSSOP-16, Parallel IO Port	获取价格

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