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PCA6107 PDF预览

PCA6107

更新时间: 2024-01-16 09:27:07
品牌 Logo 应用领域
德州仪器 - TI 输出元件
页数 文件大小 规格书
24页 307K
描述
REMOTE 8-BIT I2C AND SMBus LOW-POWER I/O EXPANDER WITH INTERRUPT OUTPUT, RESET, AND CONFIGURATION REGISTERS

PCA6107 技术参数

生命周期:Obsolete零件包装代码:SOIC
包装说明:SOIC-18针数:18
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.37
Is Samacsys:NJESD-30 代码:R-PDSO-G18
长度:11.55 mm位数:8
I/O 线路数量:8端口数量:1
端子数量:18最高工作温度:85 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP18,.4
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
电源:2.5/5 V认证状态:Not Qualified
座面最大高度:2.65 mm子类别:Parallel IO Port
最大供电电压:5.5 V最小供电电压:2.3 V
标称供电电压:2.5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:1.27 mm
端子位置:DUAL宽度:7.5 mm
uPs/uCs/外围集成电路类型:PARALLEL IO PORT, GENERAL PURPOSEBase Number Matches:1

PCA6107 数据手册

 浏览型号PCA6107的Datasheet PDF文件第4页浏览型号PCA6107的Datasheet PDF文件第5页浏览型号PCA6107的Datasheet PDF文件第6页浏览型号PCA6107的Datasheet PDF文件第8页浏览型号PCA6107的Datasheet PDF文件第9页浏览型号PCA6107的Datasheet PDF文件第10页 
PCA6107  
REMOTE 8-BIT I2C AND SMBus LOW-POWER I/O EXPANDER  
WITH INTERRUPT OUTPUT, RESET, AND CONFIGURATION REGISTERS  
www.ti.com  
SCPS139BJANUARY 2006REVISED OCTOBER 2006  
Device Address  
The address of the PCA6107 is shown in Figure 4.  
Slave Address  
0
0
1
1 A2 A1 A0  
R/W  
Fixed  
Programmable  
Figure 4. PCA6107 Address  
Address Reference  
INPUTS  
I2C BUS SLAVE ADDRESS  
A2  
L
A1  
L
A0  
L
24 (decimal), 18 (hexadecimal)  
25 (decimal), 19 (hexadecimal)  
26 (decimal), 1A (hexadecimal)  
27 (decimal), 1B (hexadecimal)  
28 (decimal), 1C (hexadecimal)  
29 (decimal), 1D (hexadecimal)  
30 (decimal), 1E (hexadecimal)  
31 (decimal), 1F (hexadecimal)  
L
L
H
L
L
H
H
L
L
H
L
H
H
H
H
L
H
L
H
H
H
The last bit of the slave address defines the operation (read or write) to be performed. A high (1) selects a read  
operation, while a low (0) selects a write operation.  
Control Register and Command Byte  
Following the successful acknowledgment of the address byte, the bus master sends a command byte that is  
stored in the control register in the PCA6107. Two bits of this data byte state the operation (read or write) and  
the internal registers (input, output, polarity inversion or configuration) that will be affected. This register can be  
written or read through the I2C bus. The command byte is sent only during a write transmission.  
Once a new command byte has been sent, the register that was addressed continues to be accessed by reads  
until a new command byte has been sent.  
0
0
0
0
0
0
B1 B0  
Figure 5. Control Register Bits  
Command Byte  
CONTROL REGISTER BITS  
COMMAND BYTE  
(HEX)  
POWER-UP  
DEFAULT  
REGISTER  
PROTOCOL  
B1  
0
B0  
0
0x00  
0x01  
0x02  
0x03  
Input Port  
Output Port  
Read byte  
xxxx xxxx  
0000 0000  
1111 0000  
1111 1111  
0
1
Read/write byte  
Read/write byte  
Read/write byte  
1
0
Polarity Inversion  
Configuration  
1
1
7
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