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P89V51RC2FA,512 PDF预览

P89V51RC2FA,512

更新时间: 2024-01-07 14:03:21
品牌 Logo 应用领域
恩智浦 - NXP 时钟微控制器外围集成电路
页数 文件大小 规格书
80页 352K
描述
P89V51RB2/RC2/RD2 - 8-bit 80C51 5 V low power 16/32/64 kB flash microcontroller with 1 kB RAM

P89V51RC2FA,512 技术参数

是否Rohs认证: 符合生命周期:Obsolete
零件包装代码:LCC包装说明:QCCJ, LDCC44,.7SQ
针数:44Reach Compliance Code:unknown
ECCN代码:3A991.A.2HTS代码:8542.31.00.01
风险等级:5.77具有ADC:NO
地址总线宽度:16位大小:8
CPU系列:8051最大时钟频率:40 MHz
DAC 通道:NODMA 通道:NO
外部数据总线宽度:8JESD-30 代码:S-PQCC-J44
长度:16.585 mm湿度敏感等级:3
I/O 线路数量:32端子数量:44
最高工作温度:85 °C最低工作温度:-40 °C
PWM 通道:YES封装主体材料:PLASTIC/EPOXY
封装代码:QCCJ封装等效代码:LDCC44,.7SQ
封装形状:SQUARE封装形式:CHIP CARRIER
峰值回流温度(摄氏度):245电源:5 V
认证状态:Not QualifiedRAM(字节):1024
ROM(单词):32768ROM可编程性:FLASH
座面最大高度:4.57 mm速度:40 MHz
子类别:Microcontrollers最大压摆率:50 mA
最大供电电压:5.5 V最小供电电压:4.5 V
标称供电电压:5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子形式:J BEND端子节距:1.27 mm
端子位置:QUAD处于峰值回流温度下的最长时间:30
宽度:16.585 mmuPs/uCs/外围集成电路类型:MICROCONTROLLER
Base Number Matches:1

P89V51RC2FA,512 数据手册

 浏览型号P89V51RC2FA,512的Datasheet PDF文件第2页浏览型号P89V51RC2FA,512的Datasheet PDF文件第3页浏览型号P89V51RC2FA,512的Datasheet PDF文件第4页浏览型号P89V51RC2FA,512的Datasheet PDF文件第5页浏览型号P89V51RC2FA,512的Datasheet PDF文件第6页浏览型号P89V51RC2FA,512的Datasheet PDF文件第7页 
P89V51RB2/RC2/RD2  
8-bit 80C51 5 V low power 16/32/64 kB flash microcontroller  
with 1 kB RAM  
Rev. 05 — 12 November 2009  
Product data sheet  
1. General description  
The P89V51RB2/RC2/RD2 are 80C51 microcontrollers with 16/32/64 kB flash and  
1024 B of data RAM.  
A key feature of the P89V51RB2/RC2/RD2 is its X2 mode option. The design engineer  
can choose to run the application with the conventional 80C51 clock rate (12 clocks per  
machine cycle) or select the X2 mode (six clocks per machine cycle) to achieve twice the  
throughput at the same clock frequency. Another way to benefit from this feature is to keep  
the same performance by reducing the clock frequency by half, thus dramatically reducing  
the EMI.  
The flash program memory supports both parallel programming and in serial ISP. Parallel  
programming mode offers gang-programming at high speed, reducing programming costs  
and time to market. ISP allows a device to be reprogrammed in the end product under  
software control. The capability to field/update the application firmware makes a wide  
range of applications possible.  
The P89V51RB2/RC2/RD2 is also capable of IAP, allowing the flash program memory to  
be reconfigured even while the application is running.  
2. Features  
I 80C51 CPU  
I 5 V operating voltage from 0 MHz to 40 MHz  
I 16/32/64 kB of on-chip flash user code memory with ISP and IAP  
I Supports 12-clock (default) or 6-clock mode selection via software or ISP  
I SPI and enhanced UART  
I PCA with PWM and capture/compare functions  
I Four 8-bit I/O ports with three high-current port 1 pins (16 mA each)  
I Three 16-bit timers/counters  
I Programmable watchdog timer  
I Eight interrupt sources with four priority levels  
I Second DPTR register  
I Low EMI mode (ALE inhibit)  
I TTL- and CMOS-compatible logic levels  
 
 

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