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P89V660FBC PDF预览

P89V660FBC

更新时间: 2024-02-02 18:30:43
品牌 Logo 应用领域
恩智浦 - NXP 闪存微控制器
页数 文件大小 规格书
89页 393K
描述
8-bit 80C51 5 V low power 16 kB/32 kB/64 kB flash microcontroller with 512 B/1 kB/2 kB RAM, dual I2C-bus, SPI

P89V660FBC 数据手册

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P89V660/662/664  
8-bit 80C51 5 V low power 16 kB/32 kB/64 kB flash  
microcontroller with 512 B/1 kB/2 kB RAM, dual I2C-bus, SPI  
Rev. 01 — 2 May 2007  
Product data sheet  
1. General description  
The P89V660/662/664 are 80C51 microcontrollers with 16 kB/32 kB/64 kB flash and  
512 B/1 kB/2 kB of data RAM. These devices are designed to be drop-in and software  
compatible replacements for the P89V660/662/664 devices. Both the In-System  
Programming (ISP) and In-Application Programming (IAP) boot codes are upward  
compatible.  
Additional features of the P89V660/662/664 devices when compared to the  
P89V660/662/664 devices are the inclusion of a secondary 100 kHz byte-wide I2C-bus  
interface, an SPI interface, four addition I/O pins (Port 4), and the ability to erase code  
memory in 128-byte pages.  
The IAP capability combined with the 128-byte page size allows for efficient use of the  
code memory for non-volatile data storage.  
2. Features  
2.1 Principal features  
I Dual 100 kHz byte-wide I2C-bus interfaces  
I 128-byte page erase for efficient use of code memory as non-volatile data storage  
I 0 MHz to 40 MHz operating frequency in 12x mode, 20 MHz in 6x mode  
I 16 kB/32 kB/64 kB of on-chip flash user code memory with ISP and IAP  
I 512 B/1 kB/2 kB RAM  
I SPI (Serial Peripheral Interface) and enhanced UART  
I PCA (Programmable Counter Array) with PWM and Capture/Compare functions  
I Three 16-bit timers/counters  
I Four 8-bit I/O ports, one 4-bit I/O port  
I WatchDog Timer (WDT)  
2.2 Additional features  
I 30 ms page erase, 150 ms block erase  
I Support for 12-clock (default) or 6-clock mode selection via ISP or parallel programmer  
I PLCC44 and TQFP44 packages  
I Ten interrupt sources with four priority levels  
I Second DPTR register  
I Low EMI mode (ALE inhibit)  
I Power-down mode with external interrupt wake-up  

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