Datasheet > P2065A-08TR

P2065A-08TR

更新时间： 2024-09-27 23:25:03

品牌	Logo	应用领域
其他 - ETC		逻辑集成电路光电二极管驱动
页数	文件大小	规格书
7页	96K
描述
Peripheral IC

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P2065A-08TR 数据手册

Final Product Specification

P2065

Low Spread LCD Panel EMI Reduction IC

FEATURES

•

2 selectable modulation rates

Low cycle-to-cycle jitter

•

Provides up to 20 dB of EMI suppression

FCC approved method of EMI attenuation

3.3V or 5.0 V operating range

16 mA output drives

Generates a low EMI spread spectrum clock

of the input frequency

•

40 MHz to 85 MHz input frequency range

TTL or CMOS compatible outputs

Low power CMOS design

Optimized for VGA, SVGA and high resolution

XGA LCD panels

•

Internal loop filter minimizes external

components and board space

Supports most mobile graphic accelerator

specifications

•

6 selectable low spread ranges, under +/- 1%

•

Available in 8 pin SOIC and TSSOP

SSON control pin for spread spectrum enable

and disable options

compared to the typical narrow band signal

produced by oscillators and most frequency

PRODUCT DESCRIPTION

generators.

Lowering EMI by increasing a

signal’s bandwidth is called “spread spectrum

clock generation”.

The P2065 is a selectable spread spectrum

frequency modulator designed specifically for

digital flat panel applications.

The P2065

reduces electromagnetic interference (EMI) at

the clock source which provides system wide

reduction of EMI of all clock dependent signals.

The P2065 allows significant system cost

savings by reducing the number of circuit board

layers and shielding that are traditionally

required to pass EMI regulations.

APPLICATIONS

The P2065 is targeted towards digital flat panel

applications for Notebook PCs, Palm-size PCs,

Office Automation Equipments, and LCD

Monitors.

Figure 1 – P2065 Pin Diagram

The P2065 uses the most efficient and

optimized modulation profile approved by the

FCC and is implemented in a proprietary all-

digital method.

CLKIN

MRA

SR1

VDD

The P2065 modulates the output of a single PLL

in order to “spread” the bandwidth of a

synthesized clock and, more importantly,

decreases the peak amplitudes of its harmonics.

This results in significantly lower system EMI

SR0

ModOUT

SSON

VSS

Jan., 2001

Revision D

3160 De La Cruz Blvd., Suite 200 • Santa Clara • CA • 95054

Tel (408) 748-6988 • Fax (408) 748-0009

1 of 6

http://www.pulsecore.com

12 3 4 5 6 7

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