Datasheet > P2084_11

P2084_11

更新时间： 2024-09-29 01:21:51

品牌	Logo	应用领域
安森美 - ONSEMI		/
页数	文件大小	规格书
7页	152K
描述
Low Cost Frequency Multiplier

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中文翻译

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P2084_11 数据手册

P2084A

Low Cost Frequency Multiplier

Features

• Generates 4x clock of the input clock frequency

The P2084A can generate a 4x output clock of the input

frequency which allows system cost savings by using an

inexpensive crystal or resonator to achieve high frequency

multiplication.

• Input clock frequency: 3MHz to 78MHz

• Output clock frequency:12MHz to 312MHz

• External loop filter

The P2084A provides up to 312MHz output clock

frequencies respectively through the use of the Phase-

Lock-Loop (PLL) technique which delivers low jitter and

high precision synthesized clocks.

• Low Cycle-to-Cycle Jitter

• 3.3V operating voltage range

• 10mA output drives

• TTL or CMOS compatible outputs

• Ultra-low power CMOS design

• Available in 8-pin SOIC

Applications

The P2084A is targeted towards the high frequency CAN

OSC replacement market. Applications include xDSL,

routers, networking, PC peripherals, and embedded

systems.

Product Description

P2084A is a versatile frequency multiplier that is designed

specifically as cost effective alternatives to the high

precision frequency oscillator.

FS0

FS1

VDD

Block Diagram

PLL

Modulation

XIN / CLKIN

XOUT

Frequency

Divider

Crystal

Oscillator

Output

Divider

Phase

Detector

VCO

Feedback

Divider

ModOUT

VSS

JUNE 2011 – Rev. 2

Publication Order Number:

P2084/D

12 3 4 5 6 7

中文翻译

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