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ONET1130ECRSMT PDF预览

ONET1130ECRSMT

更新时间: 2024-02-19 15:07:15
品牌 Logo 应用领域
德州仪器 - TI ATM异步传输模式驱动电信电信集成电路驱动器
页数 文件大小 规格书
64页 3255K
描述
具有双 CDR 和集成式调制器驱动器的 11.7Gbps 收发器 | RSM | 32 | -40 to 100

ONET1130ECRSMT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active包装说明:HVQCCN, LCC32,.16SQ,16
Reach Compliance Code:compliantECCN代码:5A991B1
Factory Lead Time:6 weeks风险等级:1.74
应用程序:SONETJESD-30 代码:S-PQCC-N32
JESD-609代码:e4长度:4 mm
湿度敏感等级:2功能数量:1
端子数量:32最高工作温度:100 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:HVQCCN封装等效代码:LCC32,.16SQ,16
封装形状:SQUARE封装形式:CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
座面最大高度:1 mm标称供电电压:2.5 V
表面贴装:YES电信集成电路类型:ATM/SONET/SDH TRANSCEIVER
温度等级:INDUSTRIAL端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:NO LEAD端子节距:0.4 mm
端子位置:QUAD宽度:4 mm
Base Number Matches:1

ONET1130ECRSMT 数据手册

 浏览型号ONET1130ECRSMT的Datasheet PDF文件第1页浏览型号ONET1130ECRSMT的Datasheet PDF文件第2页浏览型号ONET1130ECRSMT的Datasheet PDF文件第4页浏览型号ONET1130ECRSMT的Datasheet PDF文件第5页浏览型号ONET1130ECRSMT的Datasheet PDF文件第6页浏览型号ONET1130ECRSMT的Datasheet PDF文件第7页 
ONET1130EC  
www.ti.com.cn  
ZHCSDW5A JUNE 2015REVISED JULY 2015  
5 说明(续)  
ONET1130EC 内置模数转换器和数模转换器,可对收发器进行管理并且消除了对专用微控制器的需求。  
收发器的额定工作温度范围为 –40°C 100°C(外壳温度),并且采用符合 RoHS 标准的小型 4mm × 4mm 32 引  
脚超薄型四方扁平无引线 (VQFN) 封装。  
6 Pin Configuration and Function  
RSM PACKAGE  
32 PIN VQFN  
(TOP VIEW)  
32 31 30 29 28 27 26  
25  
LOL  
MONB  
GND  
1
2
3
4
5
6
7
8
24 RX_LOS  
23 COMP  
22 GND  
21 RXINœ  
20 RXIN+  
19 GND  
18 SCK  
TXIN+  
TXINœ  
GND  
PD  
EP  
MONP  
17 SDA  
11  
13  
10  
12  
14 15  
9
16  
Pin Functions  
NUMBER  
AMP  
NAME  
Type  
DESCRIPTION  
Output amplitude control. Output amplitude can be adjusted by applying a voltage of  
0 to 2 V to this pin. Leave open when not used.  
16  
10  
Analog-in  
Analog  
Analog  
Supply  
BIAS  
COMP  
GND  
Sinks or sources the bias current for the laser in both APC and open loop modes.  
Compensation pin used to control the bandwidth of the APC loop. Connect a 0.01-µF  
capacitor to ground.  
23  
3, 6, 19, 22  
Circuit ground.  
Transmitter and receiver loss of lock indicator. High level indicates the transmitter or  
the receiver is out of lock. Open drain output. Requires an external 4.7 kΩ to 10 kΩ  
pull-up resistor to VCC for proper operation. This pin is 3.3 V tolerant.  
LOL  
1
Digital-out  
MONB  
MONP  
PD  
2
8
7
Analog-out  
Analog-out  
Analog  
Bias current monitor.  
Photodiode current monitor.  
Photodiode input. Pin can source or sink current dependent on register setting.  
Disables the receiver output buffer when set to a high level. Includes a 250-kΩ pull-  
up resistor to VCC. Ground the pin to enable the output. This is an ORed function  
with the RXOUT_DIS bit (bit 6 in register 4). This pin is 3.3-V tolerant.  
RX_DIS  
RX_LF  
26  
25  
24  
Digital-in  
Analog-in  
Digital-out  
Receiver loop filter capacitor.  
Receiver loss of signal. High level indicates that the receiver input signal amplitude is  
below the programmed threshold level. Open drain output. Requires an external 4.7-  
kΩ to 10-kΩ pull-up resistor to VCC for proper operation. This pin is 3.3-V tolerant.  
RX_LOS  
Non-inverted receiver data input. On-chip differentially 100 Ω terminated to RXIN–.  
Must be AC coupled.  
RXIN+  
RXIN-  
20  
21  
Analog-in  
Analog-in  
Inverted receiver data input. On-chip differentially 100 Ω terminated to RXIN+. Must  
be AC coupled.  
RXOUT–  
RXOUT+  
28  
29  
CML-out  
CML-out  
Inverted receiver data output. 45 Ω back-terminated to VCC.  
Non-inverted data output. 45 Ω back-terminated to VCC.  
Copyright © 2015, Texas Instruments Incorporated  
3

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