Datasheet > NM24C16FEM8

NM24C16FEM8

更新时间： 2024-09-25 20:14:31

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟光电二极管内存集成电路
页数	文件大小	规格书
7页	25K
描述
EEPROM, 16KX1, Serial, CMOS, PDSO8, PLASTIC, SOIC-8

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技术参数
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NM24C16FEM8 技术参数

是否无铅：	含铅	是否Rohs认证：	不符合
生命周期：	Obsolete	零件包装代码：	SOIC
包装说明：	SOP, SOP8,.25	针数：	8
Reach Compliance Code：	unknown	ECCN代码：	EAR99
HTS代码：	8542.32.00.51	风险等级：	5.68
其他特性：	16 BYTE PAGE WRITE MODE; DATA RETENTION > 40 YEARS	最大时钟频率 (fCLK)：	0.4 MHz
数据保留时间-最小值：	40	耐久性：	1000000 Write/Erase Cycles
I2C控制字节：	1010MMMR	JESD-30 代码：	R-PDSO-G8
JESD-609代码：	e0	长度：	4.9 mm
内存密度：	16384 bit	内存集成电路类型：	EEPROM
内存宽度：	1	功能数量：	1
端子数量：	8	字数：	16384 words
字数代码：	16000	工作模式：	SYNCHRONOUS
最高工作温度：	85 °C	最低工作温度：	-40 °C
组织：	16KX1	封装主体材料：	PLASTIC/EPOXY
封装代码：	SOP	封装等效代码：	SOP8,.25
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE
并行/串行：	SERIAL	峰值回流温度（摄氏度）：	NOT SPECIFIED
电源：	5 V	认证状态：	Not Qualified
座面最大高度：	1.75 mm	串行总线类型：	I2C
最大待机电流：	0.00005 A	子类别：	EEPROMs
最大压摆率：	0.001 mA	最大供电电压 (Vsup)：	5.5 V
最小供电电压 (Vsup)：	4.5 V	标称供电电压 (Vsup)：	5 V
表面贴装：	YES	技术：	CMOS
温度等级：	INDUSTRIAL	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	GULL WING	端子节距：	1.27 mm
端子位置：	DUAL	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	3.9 mm	最长写入周期时间 (tWC)：	10 ms
Base Number Matches：	1

NM24C16FEM8 数据手册

Fairchild

Application Note 957

Interfacing the NM24C16

Serial EEPROM to the

8031 Microcontroller

8031 INTERFACE DESCRIPTION

INTRODUCTION

The interface to the 8031 uses 2 general purpose port lines. One

of the lines is used to drive the SCL input of the NM24C16, and the

other is used as an I/O port connected to the SDA line. The 8031

has very weak pull-ups on the output ports that provide a high

state.Whenan8031portbitissendingahigh,thebitcanbedriven

externally and used as an input.

This applications note describes an interface between the Fair-

child Semiconductor NM24C16 serial EEPROM and an 8031

microcontroller. The interface between the devices uses 2 of the

8031 general purpose I/O port lines. Software has been devel-

oped that demonstrates how the NM24C16 can be accessed

through the I/O port bits. The circuit and software has been bench

tested and is ready to be used in an end user application.

Port 1 of the 8031 provides the 2 I/O bits for the interface. Figure

1shows how the NM24C16 is connected to the 8031. The port bits

that were chosen for this interface are not especially significant.

Any 2 available port bits could be used as long as 1 can be

configured an output and 1 as an I /O with the weak pull-up.

Changes in the interface software to implement different port

placements would only require a change in the SDA and SCL port

definition at the top of the program.

NM24C16 DESCRIPTION

The NM24C16 is a 16k serial EEPROM that has a 2k by 8-bit

architecture. The NM24C16 uses the industry standard I²C serial

protocol for data transfers.

The I²C protocol allows several devices to share the same two

wire clock and data bus. Devices that are compatible with the

protocol fall into the categories of being either a master or a slave.

A master device controls the transfer of data, and a slave device

responds to the commands issued by a master. The NM24CXX

family of devices always fall into the category of slave devices

since they can not initiate data transfers.

10k

P1.0

P1.1

SDA V

SCL A0

The I²C protocol uses a clock (SCL) and a bidirectional data line

(SDA). When the NM24C16 is transmitting data an open drain

transistor is used to control the state of the SDA line. The SDA I/

O pulls the line low for a zero state, or places the line in high

impedance for a one state. An external pull-up resistor ensures a

“high” condition exists when the SDA line is in a high impedance

state.

8031

NM24C16

FIGURE 1. NM24C16 to 8031 Connections

SOFTWARE DESCRIPTION

Data is transfered back and forth by using predefined bit se-

quences. All transfers are initiated with a START condition (SDA

going low with SCL high) and terminated with a STOP condition

(SDA going high with SCL high). If an unexpected STOP is ever

detected the NM24C16 will return to the standby mode. Because

transitions of SDA when SCL is high have been defined as STOP

and START conditions, the SDA line must change only when SCL

is low while transfers are being performed.

The software listing demonstrates a byte read and byte write

operation. The read and write operations are implemented in

separate subroutines. Parameters to be passed into the subrou-

tines are stored in the SRAM portion of the 8031. The passed

parameters include address (hi-order and low-order) and data

(single byte) information. The variables are sometimes modified

during subroutine operation so they must be initialized immedi-

ately prior to a subroutine call. Expansions of the byte read and

write routines to implement sequential read and page write should

be straightforward.

DATA TRANSFERS

There are just two types of data transfers used on the NM24C16,

apagewriteoperation,andasequentialreadoperation.Bytewrite

and byte read operations are simply truncated versions of a page

write or sequential read.

The software also implements acknowledge (ACK) polling to

indicatewhenawriteoperationhascompleted.WhiletheNM24C16

isactuallychangingthestateoftheEEPROMbitsallinputpinsare

ignored. Once a write cycle has concluded the NM24C16 will

return an acknowledge when a valid slave address is issued. The

ACK polling routine repeatedly sends a slave address and check

to see if the X24C16 returns an acknowledge. A STOP condition

is issued once an ACK is received to return the NM24C16 to the

standby mode. Using acknowledge polling can significantly re-

duce the effective Write Cycle Time because the actual time

required is typically much less than the maximum specified in the

data sheet.

The page write allows up to 16 bytes in a single page to be altered

during a single write operation. It is important to note that all

addresses to be altered must reside in the same 16 byte page. A

byte write is the same as a page write with the data in a single

address being altered.

The sequential read operation will allow read operations starting

at a user defined address and then allow successive addresses to

be read as long as the user continues to indicate that the read

operation is to continue. The byte read is simply a sequential read

from only a single address.

www.fairchildsemi.com

12 3 4 5 6 7

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NM24C16FEM8 替代型号

型号	品牌	替代类型	描述	数据表
NM93C86ALM8X	FAIRCHILD	功能相似	EEPROM, 1KX16, Serial, CMOS, PDSO8, 0.150 INCH, PLASTIC, SO-8
NM93C86AEM8X	FAIRCHILD	功能相似	EEPROM, 1KX16, Serial, CMOS, PDSO8, 0.150 INCH, PLASTIC, SO-8
M24C16-MN3T/G	STMICROELECTRONICS	功能相似	16Kbit, 8Kbit, 4Kbit, 2Kbit and 1Kbit Serial I2C Bus EEPROM

与NM24C16FEM8相关器件

型号	品牌	获取价格	描述	数据表
NM24C16FEM8X	TI	获取价格	2KX8 I2C/2-WIRE SERIAL EEPROM, PDSO8, PLASTIC, SOP-8
NM24C16FEMT8	FAIRCHILD	获取价格	I2C Serial EEPROM
NM24C16FEN	FAIRCHILD	获取价格	I2C Serial EEPROM
NM24C16FLEM8	TI	获取价格	2KX8 I2C/2-WIRE SERIAL EEPROM, PDSO8, PLASTIC, SOP-8
NM24C16FLEM8	FAIRCHILD	获取价格	EEPROM, 16KX1, Serial, CMOS, PDSO8, PLASTIC, SOIC-8
NM24C16FLEM8X	FAIRCHILD	获取价格	EEPROM, 16KX1, Serial, CMOS, PDSO8, PLASTIC, SOIC-8
NM24C16FLEM8X	TI	获取价格	IC 2K X 8 I2C/2-WIRE SERIAL EEPROM, PDSO8, PLASTIC, SOP-8, Programmable ROM
NM24C16FLEMT8	FAIRCHILD	获取价格	I2C Serial EEPROM
NM24C16FLEN	FAIRCHILD	获取价格	I2C Serial EEPROM
NM24C16FLEN	TI	获取价格	2KX8 I2C/2-WIRE SERIAL EEPROM, PDIP8, PLASTIC, DIP-8

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