Datasheet > NJU26133

NJU26133

更新时间： 2024-09-24 22:44:51

品牌	Logo	应用领域
NJRC		/
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描述
NJU26100 Series Hardware Specification

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NJU26133 数据手册

NJU26100 Series

NJU26100 Series Hardware Specification

■

General Description

■Package

This document describes the NJU26100 Series common hardware specifications.

This document is applied to the NJU26101 up to the NJU26199.

The individual function is described in the each data sheet. Please refer to the

each data sheet to find the detail functions. The firmware commands are

described in the each firmware document.

NJU26100 Series

■

Hardware Specification

• 24bit Fixed-point Digital Signal Processing

• Maximum System Clock Frequency

• Digital Audio Interface

: 38MHz

: 3 Input ports / 3 Output ports

• Master / Slave Mode

• Master Mode MCK

:1/2 fclk, 1/3 fclk

ex. MCK = 384Fs(1/2) or MCK = 256Fs(1/3) at fclk=768Fs

• Two kinds of micro computer interface

I²C bus (standard-mode/100kbps)

Serial interface (4 lines: clock, enable, input data, output data)

• Power Supply

• Package

: 2.5V ( 3.3V Input tolerant )

: QFP32-R1

NJU26100 Series

AD1/SDIN AD2/SSb

SERIAL AUDIO

INTERFACE

DSP ARITHMETIC UNIT

SCL/SCK

BCKO

LRO

SERIAL

HOST

PROGRAM

CONTROL

INTERFACE

SDA/SDOUT

SERIAL OUT

SERIAL IN

SDO0

SDO1

SDO2

24-BIT x 24-BIT

MULTIPLIER

ALU

RESETb

SDI0

SDI1

MCK

SERIAL IN

TIMING

GENERATOR

ADDRESS GENERATION UNIT

SERIAL IN

SDI2

BCKI

LRI

DELAY

RAM

DATA

RAM

FIRMWARE

ROM

GPIO0

GPIO1

GPIO AND

CONFIGURATION

INTERFACE

Ver.2005-02-24

- 1 -

12 3 4 5 6 7...17

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