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NC7SZ05_04 PDF预览

NC7SZ05_04

更新时间: 2024-09-25 04:37:59
品牌 Logo 应用领域
飞兆/仙童 - FAIRCHILD /
页数 文件大小 规格书
8页 156K
描述
TinyLogic UHS Inverter (Open Drain Output)

NC7SZ05_04 数据手册

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June 1997  
Revised August 2004  
NC7SZ05  
TinyLogic UHS Inverter (Open Drain Output)  
General Description  
Features  
The NC7SZ05 is a single Inverter with open drain output  
stage from Fairchild’s Ultra High Speed Series of  
TinyLogic . The device is fabricated with advanced CMOS  
technology to achieve ultra high speed with high output  
drive while maintaining low static power dissipation over a  
very broad VCC operating range. The device is specified to  
Space saving SOT23 or SC70 5-lead package  
Ultra small MicroPak leadless package  
Open drain output for OR tied applications  
Ultra High Speed; tPD 1.9 ns Typ into 50 pF at 5V VCC  
High Output IOL Drive; +24 mA at 3V VCC  
Broad VCC Operating Range; 1.65V to 5.5V  
operate over the 1.65V to 5.5V VCC range. The input and  
output are high impedance when VCC is 0V. Inputs tolerate  
voltages up to 6V independent of VCC operating voltage.  
Matches the performance of LCX when operated at  
3.3V VCC  
The open drain output stage tolerates voltages up to 6V  
independent of VCC when in the high impedance state.  
Power down high impedance inputs/output  
Overvoltage Tolerant inputs facilitate 5V to 3V  
translation  
Patented noise/EMI reduction circuitry implemented  
Ordering Code:  
Order  
Number  
Package  
Number  
MA05B  
Product Code  
Top Mark  
7Z05  
Package Description  
Supplied As  
NC7SZ05M5X  
NC7SZ05P5X  
NC7SZ05L6X  
5-Lead SOT23, JEDEC MO-178, 1.6mm  
3k Units on Tape and Reel  
MAA05A  
MAC06A  
Z05  
5-Lead SC70, EIAJ SC-88a, 1.25mm Wide 3k Units on Tape and Reel  
6-Lead MicroPak, 1.0mm Wide 5k Units on Tape and Reel  
C6  
Logic Symbol  
Connection Diagrams  
IEEE/IEC  
Pin Assignments for SOT23 and SC70  
Pin Descriptions  
Pin Names  
Description  
Input  
A
Y
(Top View)  
Output  
NC  
No Connect  
Pad Assignments for MicroPak  
Function Table  
Y = A  
Input  
Output  
A
L
Y
*H  
L
H
(Top Thru View)  
H = HIGH Logic Level  
L = LOW Logic Level  
*H = HIGH Impedance output state (Open Drain)  
TinyLogic is a registered trademark of Fairchild Semiconductor Corporation.  
MicroPak are trademarks of Fairchild Semiconductor Corporation.  
© 2004 Fairchild Semiconductor Corporation  
DS012174  
www.fairchildsemi.com  

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