Datasheet > N84C163_18

N84C163_18

更新时间： 2024-01-29 13:37:13

品牌	Logo	应用领域
安森美 - ONSEMI		/
页数	文件大小	规格书
13页	212K
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Supervisory Circuits

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数据手册

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N84C163_18 数据手册

N84C163

Supervisory Circuits with

EEPROM Serial 16-Kb I²C

Precision Reset Controller

and Watchdog Timer (16K)

www.onsemi.com

Description

The N84C163 is a complete memory and supervisory solution for

microcontroller−based systems. A serial EEPROM memory (16K)

with hardware memory write protection, a system power supervisor

with brown out protection and a watchdog timer are integrated

together in low power CMOS technology. Memory interface is via an

SOIC−8

CASE 751BD

I C bus.

The 1.6−second watchdog circuit returns a system to a known good

state if a software or hardware glitch halts or “hangs” the system. The

N84C163 watchdog monitors the WDI input pin.

PIN CONFIGURATION

The power supply monitor and reset circuit protects memory and

system controllers during power up/down and against brownout

conditions. Five reset threshold voltages support 5 V, 3.3 V and 3 V

systems. If power supply voltages are out of tolerance reset signals

become active, preventing the system microcontroller, ASIC or

peripherals from operating. Reset signals become inactive typically

200 ms after the supply voltage exceeds the reset threshold level. With

both active high and low reset signals, interface to microcontrollers

and other ICs is simple. In addition, a reset pin can be used as a

debounced input for pushbutton manual reset capability.

SOIC 8 Lead

WDI

RESET

N84C163

SCL

SDA

GND

PIN FUNCTIONS

Function

The N84C163 memory features a 16−byte page. In addition,

hardware data protection is provided by a write protect pin WP and by

Pin Name

WDI

RESET

Watchdog Timer Input

Active Low Reset I/O

Write Protect

a V sense circuit that prevents writes to memory whenever V falls

below the reset threshold or until V reaches the reset threshold

during power up.

This device is available in a green SOIC−8 package.

GND

Ground

SDA

Serial Data/Address

Clock Input

Features

SCL

• Watchdog Timer Input (WDI)

RESET

Active High Reset I/O

Power Supply

• 400 kHz I C Bus Compatible

• 2.7 V to 6.0 V Operation

• Low Power CMOS Technology

• 16−Byte Page Write Buffer

ORDERING INFORMATION

• Built−in Inadvertent Write Protection

For Ordering Information details, see page 10.

♦ V Lock Out

♦ Write Protection Pin, WP

• 100 Year Data Retention

• Active High or Low Reset

♦ Precision Power Supply Voltage Monitor

♦ 5 V, 3.3 V and 3 V Systems

• 8−Pin SOIC Package

• Commercial and Industrial Temperature Ranges

♦ Five Threshold Voltage Options

• These Devices are Pb−Free, Halogen Free/BFR Free

• 1,000,000 Program/Erase Cycles

• Manual Reset

and are RoHS Compliant

Publication Order Number:

May, 2018 − Rev. 1

N84C163/D

12 3 4 5 6 7...13

中文翻译

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