生命周期: | Obsolete | 包装说明: | , |
Reach Compliance Code: | unknown | HTS代码: | 8542.39.00.01 |
风险等级: | 5.33 | 系列: | LS |
JESD-30 代码: | R-PDIP-T14 | 负载电容(CL): | 15 pF |
逻辑集成电路类型: | AND GATE | 功能数量: | 4 |
输入次数: | 2 | 端子数量: | 14 |
最高工作温度: | 70 °C | 最低工作温度: | |
封装主体材料: | PLASTIC/EPOXY | 封装形状: | RECTANGULAR |
封装形式: | IN-LINE | 最大电源电流(ICC): | 8.8 mA |
传播延迟(tpd): | 20 ns | 认证状态: | Not Qualified |
最大供电电压 (Vsup): | 5.25 V | 最小供电电压 (Vsup): | 4.75 V |
标称供电电压 (Vsup): | 5 V | 表面贴装: | NO |
技术: | TTL | 温度等级: | COMMERCIAL |
端子形式: | THROUGH-HOLE | 端子位置: | DUAL |
Base Number Matches: | 1 |
型号 | 品牌 | 获取价格 | 描述 | 数据表 |
N74LS09A | PHILIPS |
获取价格 |
AND Gate, TTL, PDIP14 | |
N74LS09F | NXP |
获取价格 |
AND Gate, LS Series, 4-Func, 2-Input, TTL, CDIP14 | |
N74LS107A | NXP |
获取价格 |
J-K Flip-Flop, LS Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TT | |
N74LS107D | PHILIPS |
获取价格 |
J-K Flip-Flop, 2-Func, Master-slave Triggered, TTL, PDSO14 | |
N74LS107D-T | PHILIPS |
获取价格 |
J-K Flip-Flop, 2-Func, Master-slave Triggered, TTL, PDSO14 | |
N74LS107FB | PHILIPS |
获取价格 |
J-K Flip-Flop, 2-Func, Master-slave Triggered, TTL, CDIP14 | |
N74LS107N-B | PHILIPS |
获取价格 |
J-K Flip-Flop, 2-Func, Master-slave Triggered, TTL, PDIP14 | |
N74LS109AD | YAGEO |
获取价格 |
J-Kbar Flip-Flop, LS Series, 2-Func, Positive Edge Triggered, 2-Bit, Complementary Output, | |
N74LS10A | NXP |
获取价格 |
NAND Gate, LS Series, 3-Func, 3-Input, TTL, PDIP14 | |
N74LS10D-T | PHILIPS |
获取价格 |
NAND Gate, TTL, PDSO14 |