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N01M083WL1AN-70I PDF预览

N01M083WL1AN-70I

更新时间: 2024-01-29 05:51:57
品牌 Logo 应用领域
NANOAMP 静态存储器
页数 文件大小 规格书
9页 224K
描述
SRAM

N01M083WL1AN-70I 技术参数

生命周期:Contact Manufacturer包装说明:,
Reach Compliance Code:unknown风险等级:5.8
Base Number Matches:1

N01M083WL1AN-70I 数据手册

 浏览型号N01M083WL1AN-70I的Datasheet PDF文件第2页浏览型号N01M083WL1AN-70I的Datasheet PDF文件第3页浏览型号N01M083WL1AN-70I的Datasheet PDF文件第4页浏览型号N01M083WL1AN-70I的Datasheet PDF文件第6页浏览型号N01M083WL1AN-70I的Datasheet PDF文件第7页浏览型号N01M083WL1AN-70I的Datasheet PDF文件第8页 
NanoAmp Solutions, Inc.  
Timing Test Conditions  
N01M083WL1A  
Item  
0.1VCC to 0.9 VCC  
Input Pulse Level  
Input Rise and Fall Time  
Input and Output Timing Reference Levels  
Output Load  
5ns  
0.5 VCC  
CL = 30pF  
-40 to +85 oC  
Operating Temperature  
Timing  
2.3 - 3.6 V  
2.7 - 3.6 V  
Item  
Symbol  
Units  
Min.  
Max.  
Min.  
Max.  
tRC  
tAA  
Read Cycle Time  
100  
70  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Address Access Time  
100  
100  
35  
70  
70  
35  
tCO  
tOE  
tLZ  
Chip Enable to Valid Output  
Output Enable to Valid Output  
Chip Enable to Low-Z output  
Output Enable to Low-Z Output  
Chip Disable to High-Z Output  
Output Disable to High-Z Output  
Output Hold from Address Change  
Write Cycle Time  
15  
10  
0
10  
5
tOLZ  
tHZ  
30  
30  
0
20  
20  
tOHZ  
tOH  
tWC  
tCW  
tAW  
tWP  
tAS  
0
0
15  
100  
70  
70  
50  
0
10  
70  
50  
50  
40  
0
Chip Enable to End of Write  
Address Valid to End of Write  
Write Pulse Width  
Address Setup Time  
tWR  
tWHZ  
tDW  
tDH  
tOW  
Write Recovery Time  
0
0
Write to High-Z Output  
30  
20  
Data to Write Time Overlap  
Data Hold from Write Time  
End Write to Low-Z Output  
50  
0
40  
0
10  
5
ns  
Stock No. 23206-01 11/01/02  
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.  
5

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