PRELIMINARY
MX98L715BEC
3.3VSINGLECHIPFASTETHERNETNICCONTROLLER
1. FEATURES10/100M
Ethernet Interface
PCI/MiniPCIinterface
• FullycomplytoPCIspec. 2.2andMiniPCIspec. 0.73
up to 33MHz
• A single chip solution integrates 100/10 Base-T fast
Ethernet MAC, PHY and PMD
• Fully comply to Advanced Configuration and Power
Interface (ACPI) Rev 1.1
• FullycomplytoPCIBusPowerManagementInterface
spec. Rev 1.1
• Fully comply to IEEE 802.3u specification
• Operatesover100metersofSTPandcat5UTPcable
• Support full and half duplex operations in both 100
Base-TX and 10 Base-T mode
• Busmasterarchitecturewithlinkedhostbuffersdeliv-
ers the most optimized performance
• 32-bit bus master DMA channel provides ultra low
CPUutilizationsuitableforserverandwindowsappli-
cations.
• Proprietary Adaptive Network Throughput Control
(ANTC) technology to optimize data integrity and
throughput
• Supports IEEE802.3x Frame Based Flow Control
scheme in full duplex mode.
• Supports transmission and reception of IEEE802.1Q
taggedframes.
• Supports QoS with prioritized traffic.
• Supports network and communication device class
OnNow requirements for Microsoft's PC99 specifica-
tions, including 3 wake up events :
- Link Change (link-on)
- Wake Up Frames
Otherfeatures
- Magic Packet
• 100/10Base-TNWAYauto-negotiationfunction
• Support up to 5 LEDs for various network activities
• Supports early interrupt on both transmit and receive
operations.
• Support a variety of flexible address filtering modes
with 16 CAM address and 64 bits hash table
• Large on-chip FIFOs for both transmit and receive
operations without external local memory
• Support up to 128K bytes boot ROM/Flash interface
• MicroWire interface to EEPROM for customer's IDs
andconfigurationdata
• Single 3.3Vpowersupply,CMOStechnology,128-pin
PQFP package
HomePNAinterface
( Magic Packet Technology is a trademark of Advanced Micro De-
vice Corp. )
• Support7-wire generalpurposeserialinterfacetolink
with 1M8 PHY for home networking
2. GENERAL DESCRIPTIONS
The MX98L715BEC controller is an IEEE802.3u com-
pliant single chip 32-bit full duplex, 10/100Mbps highly
integrated Fast Ethernet combo solution, designed to
address high performance local area networking (LAN)
system application requirements.
The MX98L715BEC contains a PCI local bus glueless
interface, a Direct Memory Access (DMA) buffer man-
agement unit, an IEEE802.3u-compliant Media Access
Controller (MAC), largeTransmit and Receive FIFOs, and
an on-chip 10 Base-T and 100 Base-TX transceiver sim-
plifying system design and improving high speed signal
quality. Full-duplex operation are supported in both 10
Base-T and 100 Base-TX modes that increases the
controller's operating bandwidth up to 200Mbps.
Equipped with intelligent IEEE802.3u-compliant auto-ne-
gotiation, the MX98L715BEC-based adapter allows a
single RJ-45 connector to link with the other IEEE802.3u-
compliant device without re-configuration.
MX98L715BEC's PCI bus master architecture delivers
the optimized performance for future high speed and pow-
erful processor technologies. In other words, the
MX98L715BEC not only keeps CPU utilization low while
maximizing data throughput, but it also optimizes the
PCI bandwidth providing the highest PCI bandwidth uti-
lization. To further reduce maintenance costs the
MX98L715BEC uses drivers that are backward compat-
ible with the original MXIC MX98715 series controllers.
P/N:PM0695
REV. 0.3, MAR. 30, 2001
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