Datasheet > MTP3401N3

MTP3401N3

更新时间： 2024-02-10 07:29:46

品牌	Logo	应用领域
全宇昕 - CYSTEKEC		/
页数	文件大小	规格书
8页	586K
描述
P-CHANNEL Enhancement Mode MOSFET

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数据手册

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MTP3401N3 数据手册

Spec. No. : C388N3

Issued Date : 2007.06.13

Revised Date :2008.12.17

Page No. : 1/8

CYStech Electronics Corp.

P-CHANNEL Enhancement Mode MOSFET

MTP3401N3

Features

• V_DS=-30V

R_DS(ON)=65m @V_GS=-4.5V, I_DS=-4A

R_DS(ON)=120m @V_GS=-2.5V, I_DS=-1A

• Advanced trench process technology

• High density cell design for ultra low on resistance

• Low gate charge

• Compact and low profile SOT-23 package

• Pb-free & Halogen-free package

Equivalent Circuit

Outline

MTP3401N3

SOT-23

G：Gate

S：Source

D：Drain

Absolute Maximum Ratings (Ta=25°C)

Parameter

Symbol

Limits

Unit

Drain-Source Voltage

Gate-Source Voltage

VDS

VGS

-30

±12

-4.2

-3.5

-30

I^D

IDM

Continuous Drain Current @TA=25°C (Note 1)

Continuous Drain Current @TA=70°C (Note 1)

Pulsed Drain Current

Maximum Power Dissipation

Linear Derating Factor

(Note 2)

1.38

0.01

W/°C

°C

Operating Junction and Storage Temperature

Tj, Tstg

-55~+150

Note : 1. Surface mounted on 1 in² copper pad of FR-4 board, 270°C/W when mounted on minimum copper pad.

2. Pulse width limited by maximum junction temperature.

MTP3401N3

CYStek Product Specification

12 3 4 5 6 7 8

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