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MT8816AE1 PDF预览

MT8816AE1

更新时间: 2024-09-30 19:52:11
品牌 Logo 应用领域
美高森美 - MICROSEMI 光电二极管
页数 文件大小 规格书
15页 293K
描述
Cross Point Switch, 1 Func, 16 Channel, CMOS, PDIP40, LEAD FREE, PLASTIC, MS-011AC, DIP-40

MT8816AE1 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:DIP
包装说明:DIP, DIP40,.6针数:40
Reach Compliance Code:compliantHTS代码:8542.39.00.01
风险等级:5.27其他特性:8 X 16 ARRAY
模拟集成电路 - 其他类型:CROSS POINT SWITCHJESD-30 代码:R-PDIP-T40
JESD-609代码:e3长度:51.75 mm
标称负供电电压 (Vsup):-7 V信道数量:16
功能数量:1端子数量:40
标称断态隔离度:95 dB通态电阻匹配规范:5 Ω
最大通态电阻 (Ron):185 Ω最高工作温度:85 °C
最低工作温度:-40 °C输出:SEPARATE OUTPUT
封装主体材料:PLASTIC/EPOXY封装代码:DIP
封装等效代码:DIP40,.6封装形状:RECTANGULAR
封装形式:IN-LINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:5/12,GND/-7 V认证状态:Not Qualified
座面最大高度:6.35 mm子类别:Multiplexer or Switches
最大供电电压 (Vsup):13.2 V最小供电电压 (Vsup):4.5 V
标称供电电压 (Vsup):5 V表面贴装:NO
最长接通时间:100 ns技术:CMOS
温度等级:INDUSTRIAL端子面层:MATTE TIN
端子形式:THROUGH-HOLE端子节距:2.54 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:15.24 mmBase Number Matches:1

MT8816AE1 数据手册

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MT8816  
ISO-CMOS 8 x 16 Analog Switch Array  
Data Sheet  
September 2011  
Features  
Internal control latches and address decoder  
Ordering Information  
Short set-up and hold times  
MT8816AP1  
44 Pin PLCC*  
MT8816APR1 44 Pin PLCC*  
Tubes  
Tape & Reel  
Tubes  
Wide operating voltage: 4.5 V to 13.2 V  
12Vpp analog signal capability  
MT8816AE1  
MT8816AF1  
40 Pin PDIP*  
44 Pin TQFP*  
Trays  
* Pb Free Matte Tin  
R
ON 65 max. @ VDD = 12 V, 25C  
RON 10 @ VDD = 12 V, 25C  
-40C to +85C  
Full CMOS switch for low distortion  
Minimum feedthrough and crosstalk  
Description  
Separate analog and digital reference supplies  
Low power consumption ISO-CMOS technology  
The Zarlink MT8816 is fabricated in Zarlink’s ISO-  
CMOS technology providing low power dissipation and  
high reliability. The device contains a 8 x 16 array of  
crosspoint switches along with a 7 to 128 line decoder  
and latch circuits. Any one of the 128 switches can be  
addressed by selecting the appropriate seven address  
bits. The selected switch can be turned on or off by  
applying a logical one or zero to the DATA input. VSS is  
the ground reference of the digital inputs. The range of  
the analog signal is from VDD to VEE. Chip Select (CS)  
allows the crosspoint array to be cascaded for matrix  
expansion.  
Applications  
Key systems  
PBX systems  
Mobile radio  
Test equipment/instrumentation  
Analog/digital multiplexers  
Audio/Video switching  
CS STROBE  
DATA RESET  
VDD  
VEE  
VSS  
1
1
AX0  
AX1  
AX2  
8 x 16  
Switch  
Array  
7 to 128  
Decoder  
AX3  
Xi I/O  
(i=0-15)  
Latches  
AY0  
AY1  
AY2  
128  
128  
• • • • • • • • • • • • • • • • • • •  
Yi I/O (i=0-7)  
Figure 1 - Functional Block Diagram  
1
Zarlink Semiconductor Inc.  
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.  
Copyright 1997-2011, Zarlink Semiconductor Inc. All Rights Reserved.  

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