MT55L256V18P1B-10IT PDF预览

MT55L256V18P1B-10IT

更新时间: 2025-09-10 07:12:15
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 静态存储器内存集成电路
页数 文件大小 规格书
31页 502K
描述
ZBT SRAM, 256KX18, 5ns, CMOS, PBGA119, 14 X 22 MM, PLASTIC, MS-028BHA, BGA-119

MT55L256V18P1B-10IT 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:BGA
包装说明:BGA,针数:119
Reach Compliance Code:compliantECCN代码:3A991.B.2.A
HTS代码:8542.32.00.41风险等级:5.6
最长访问时间:5 nsJESD-30 代码:R-PBGA-B119
JESD-609代码:e0长度:22 mm
内存密度:4718592 bit内存集成电路类型:ZBT SRAM
内存宽度:18湿度敏感等级:3
功能数量:1端子数量:119
字数:262144 words字数代码:256000
工作模式:SYNCHRONOUS最高工作温度:85 °C
最低工作温度:-40 °C组织:256KX18
封装主体材料:PLASTIC/EPOXY封装代码:BGA
封装形状:RECTANGULAR封装形式:GRID ARRAY
并行/串行:PARALLEL峰值回流温度(摄氏度):220
认证状态:Not Qualified座面最大高度:2.4 mm
最大供电电压 (Vsup):3.465 V最小供电电压 (Vsup):3.135 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:TIN LEAD端子形式:BALL
端子节距:1.27 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:14 mm
Base Number Matches:1

MT55L256V18P1B-10IT 数据手册

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PRELIMINARY  
4Mb: 256K x 18, 128K x 32/36  
PIPELINED ZBT SRAM  
MT55L256L18P1, MT55L256V18P1,  
MT55L128L32P1, MT55L128V32P1,  
MT55L128L36P1, MT55L128V36P1  
4Mb  
ZBT® SRAM  
3.3V VDD, 3.3V or 2.5V I/O  
FEATURES  
1
100-PinTQFP  
• High frequency and 100 percent bus utilization  
• Fast cycle times: 6ns, 7.5ns and 10ns  
• Single +3.3V 5ꢀ poꢁer supply ꢂVDD)  
• Separate +3.3V or +2.5V isolated output buffer  
supply ꢂVDDQ)  
• Advanced control logic for minimum control  
signal interface  
• Individual BYTE WRITE controls may be tied LOW  
• Single R/W# ꢂread/ꢁrite) control pin  
• CKE# pin to enable clock and suspend operations  
• Three chip enables for simple depth expansion  
• Clock-controlled and registered addresses, data  
I/Os and control signals  
• Internally self-timed, fully coherent WRITE  
• Internally self-timed, registered outputs to  
eliminate the need to control OE#  
• SNOOZE MODE for reduced-poꢁer standby  
• Common data inputs and data outputs  
• Linear or interleaved burst modes  
• Burst feature ꢂoptional)  
165-PinFBGA  
(Preliminary Package Data)  
• Pin/function compatibility ꢁith 2Mb, 8Mb, and  
16Mb ZBT SRAM family  
• Automatic poꢁer-doꢁn  
• 165-pin FBGA package  
• 100-pin TQFP package  
• 119-pin BGA package  
OPTIONS  
MARKING*  
• Timing ꢂAccess/Cycle/MHz)  
3.5ns/6ns/166 MHz  
4.2ns/7.5ns/133 MHz  
5ns/10ns/100 MHz  
• Configurations  
3.3V I/O  
-6  
-7.5  
-10  
2
119-Pin BGA  
256K x 18  
MT55L256L18P1  
MT55L128L32P1  
MT55L128L36P1  
128K x 32  
128K x 36  
2.5V I/O  
256K x 18  
MT55L256V18P1  
MT55L128V32P1  
MT55L128V36P1  
128K x 32  
128K x 36  
• Package  
100-pin TQFP  
T
F
NOTE: 1. JEDEC-standardMS-026BHA(LQFP).  
165-pin FBGA  
2. JEDEC-standardMS-028BHA(PBGA).  
119-pin, 14mm x 22mm BGA  
• Operating Temperature Range  
Commercial ꢂ0°C to +70°C)  
Industrial ꢂ-40°C to +85°C)**  
Part Number Example:  
B
None  
IT  
* A Part Marking Guide for the FBGA devices can be found on Micron’s  
ꢁebsite—http://ꢁꢁꢁ.micron.com/support/index.html.  
** Industrial temperature range offered in specific speed grades and  
confgurations. Contact factory for more information.  
MT55L256L18P1T-10  
4Mb: 256K x 18, 128K x 32/36 Pipelined ZBT SRAM  
MT55L256L18P1_C.p65 – Rev. 6/01  
MicronTechnology,Inc.,reservestherighttochangeproductsorspecificationswithoutnotice.  
©2001,MicronTechnology,Inc.  
1

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