Datasheet > MT53E256M32D2DS-046 WT

MT53E256M32D2DS-046 WT

更新时间： 2025-08-01 15:17:39

品牌	Logo	应用领域
镁光 - MICRON		/
页数	文件大小	规格书
304页	9866K
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MT53E256M16D1, MT53E256M32D2

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Micron Confidential and Proprietary

200b: x16/x32 LPDDR4/LPDDR4X SDRAM

Features

LPDDR4/LPDDR4X SDRAM

MT53E256M16D1, MT53E256M32D2

Options

Marking

Features

• V_DD1/V_DD2/V_DDQ: 1.80V/1.10V/1.10V or

0.60V

This data sheet is for LPDDR4 and LPDDR4X unified

product based on LPDDR4X information. Refer to

LPDDR4 setting section LPDDR4 1.10V V_DDQat the

end of this data sheet.

• Array configuration

– 256 Meg × 16 (1 channel ×16 I/O)

– 256 Meg × 32 (2 channels ×16 I/O)

• Device configuration

– 256M16 × 1 die in package

– 256M16 × 2 die in package

• FBGA “green” package

– 200-ball WFBGA (10mm × 14.5mm ×

0.8mm, Ø0.35 SMD)

256M16

256M32

• Ultra-low-voltage core and I/O power supplies

– V_DD1= 1.70–1.95V; 1.80V nominal

– V_DD2= 1.06–1.17V; 1.10V nominal

– V_DDQ= 1.06–1.17V; 1.10V nominal

or Low V_DDQ= 0.57–0.65V; 0.60V nominal

• Frequency range

– 200-ball TFBGA (10mm × 14.5mm ×

1.1mm, Ø0.40 SMD)

– 2133–10 MHz (data rate range: 4266–20 Mb/s/

pin)

• Speed grade, cycle time

– 535ps @ RL = 32/36

– 468ps @ RL = 36/40

• 16n prefetch DDR architecture

• 8 internal banks per channel for concurrent opera-

tion

-053

-046

• Operating temperature range

– –30°C to +85°C

– –40°C to +95°C

• Single-data-rate CMD/ADR entry

• Bidirectional/differential data strobe per byte lane

• Programmable READ and WRITE latencies (RL/WL)

• Programmable and on-the-fly burst lengths (BL =

16, 32)

• Revision

• Directed per-bank refresh for concurrent bank op-

eration and ease of command scheduling

• Up to 8.5 GB/s per die

• On-chip temperature sensor to control self refresh

rate

• Partial-array self refresh (PASR)

• Selectable output drive strength (DS)

• Clock-stop capability

• RoHS-compliant, “green” packaging

• Programmable V_SS(ODT) termination

Table 1: Key Timing Parameters

WRITE Latency

READ Latency

Speed

Grade

Clock Rate

(MHz)

Data Rate

(Mb/s/pin)

Set A

Set B

DBI Disabled

DBI Enabled

-053

-046

1866

2133

3733

4266

CCM005-554574167-10527

200b_z00m_non_auto_lpddr4_lpddr4x.pdf – Rev. I 02/2021 EN

Micron Technology, Inc. reserves the right to change products or specifications without notice.

Products and specifications discussed herein are subject to change by Micron without notice.

12 3 4 5 6 7...304

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与MT53E256M32D2DS-046 WT相关器件

型号	品牌	获取价格	描述	数据表
MT53E256M32D2DS-053 AAT	MICRON	获取价格	MT53E256M16D1, MT53E256M32D2
MT53E256M32D2DS-053 AIT	MICRON	获取价格	MT53E256M16D1, MT53E256M32D2
MT53E256M32D2DS-053 AUT	MICRON	获取价格	MT53E256M16D1, MT53E256M32D2
MT53E256M32D2DS-053 WT	MICRON	获取价格	MT53E256M16D1, MT53E256M32D2
MT53E256M32D2FW-046 AAT	MICRON	获取价格	MT53E256M16D1, MT53E256M32D2
MT53E256M32D2FW-046 AIT	MICRON	获取价格	MT53E256M16D1, MT53E256M32D2
MT53E256M32D2FW-046 AUT	MICRON	获取价格	MT53E256M16D1, MT53E256M32D2
MT53E256M32D2FW-046 WT	MICRON	获取价格	MTA18ASF4G72PDZ – 32GB
MT53E2G32D4DE-046 AAT	MICRON	获取价格	This tech note describes considerations in thermal applications for Micron memory devices,
MT53E2G32D4DE-046 AIT	MICRON	获取价格	MT53E1G16D1, MT53E1G32D2, MT53E2G32D4, MT53E4G32D8

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