MSM7578V

更新时间： 2024-01-05 02:39:02

品牌	Logo	应用领域
冲电气 - OKI		/
页数	文件大小	规格书
18页	159K
描述
Single Rail CODEC

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技术参数
数据手册

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MSM7578V 技术参数

是否Rohs认证：	不符合	生命周期：	Obsolete
零件包装代码：	DIP	包装说明：	DIP, DIP16,.3
针数：	16	Reach Compliance Code：	unknown
HTS代码：	8542.39.00.01	风险等级：	5.29
Is Samacsys：	N	压伸定律：	A/MU-LAW
滤波器：	YES	JESD-30 代码：	R-PDIP-T16
JESD-609代码：	e0	长度：	19.05 mm
线性编码：	NOT AVAILABLE	功能数量：	1
端子数量：	16	工作模式：	SYNCHRONOUS
最高工作温度：	85 °C	最低工作温度：	-30 °C
封装主体材料：	PLASTIC/EPOXY	封装代码：	DIP
封装等效代码：	DIP16,.3	封装形状：	RECTANGULAR
封装形式：	IN-LINE	峰值回流温度（摄氏度）：	NOT SPECIFIED
电源：	5 V	认证状态：	Not Qualified
座面最大高度：	5.08 mm	子类别：	Codecs
最大压摆率：	0.009 mA	标称供电电压：	5 V
表面贴装：	NO	技术：	CMOS
电信集成电路类型：	PCM CODEC	温度等级：	OTHER
端子面层：	Tin/Lead (Sn/Pb)	端子形式：	THROUGH-HOLE
端子节距：	2.54 mm	端子位置：	DUAL
处于峰值回流温度下的最长时间：	NOT SPECIFIED	宽度：	7.62 mm
Base Number Matches：	1

MSM7578V 数据手册

¡ Semiconductor

MSM7578H/7578V/7579

Power supply for +5 V.

PCMIN

PCM signal input.

A serial PCM signal input to this pin is converted to an analog signal in synchronization with the

RSYNC signal and BCLK signal.

The data rate of the PCM signal is equal to the frequency of the BCLK signal.

ThePCMsignalisshiftedatafallingedgeoftheBCLKsignalandlatchedintotheinternalregister

when shifted by eight bits.

The start of the PCM data (MSD) is identified at the rising edge of RSYNC.

BCLK

Shift clock signal input for the PCMIN and PCMOUT signal.

The frequency, equal to the data rate, is 64, 96, 128, 192, 256, 384, 512, 768, 1024, 1536, 1544, 2048,

or 200 kHz. Setting this signal to logic “1” or “0” drives both transmit and receive circuits to the

power saving state.

RSYNC

Receive synchronizing signal input.

Eight required bits are selected from serial PCM signals on the PCMIN pin by the receive

synchronizing signal.

Signals in the receive section are synchronized by this synchronizing signal. This signal must be

synchronized in phase with the BCLK. The frequency should be 8 kHz ±50 ppm to guarantee the

AC characteristics which are mainly the frequency characteristics of the receive section.

However, if the frequency characteristic of an applied system is not specified exactly, this device

can operate in the range of 8 kHz ±2 kHz, but the electrical characteristics in this specification are

not guaranteed.

XSYNC

Transmit synchronizing signal input.

The PCM output signal from the PCMOUT pin is output in synchronization with this transmit

synchronizing signal. This synchronizing signal triggers the PLL and synchronizes all timing

signals of the transmit section.

This synchronizing signal must be synchronized in phase with BCLK.

The frequency should be 8 kHz ±50 ppm to guarantee the AC characteristics which are mainly

the frequency characteristics of the transmit section.

However, if the frequency characteristic of an applied system is not specified exactly, this device

can operate in the range of 8 kHz ±2 kHz, but the electrical characteristics in this specification are

not guaranteed.

Settingthissignaltologic“1”or“0”drivesbothtransmitandreceivecircuitstothepowersaving

state.

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