MPQ7200A – 42V, 1.2A BUCK-BOOST OR 3A BUCK, 410kHz, LED DRIVER, AEC-Q100
PIN FUNCTIONS
Pin #
Name Description
Two-step dimming duty setting. Connect a resistor (RDUTY) between DUTY and AGND to set
the duty cycle for two-step dimming or disable two-step dimming. The two-step dimming duty
DUTY cycle can be set between 5% and 15%, with a 1% step. See the Two-Step Dimming section on
page 44 for more details. If the DUTY pin is shorted to ground or an open condition is detected
before start-up, the part latches off, and FAULT asserts.
1
2
NC
No connection. Leave the NC pin floating.
Enable/dimming control. Pull EN/DIM high to enable the chip. The part starts to sense the
different pin configurations at the first positive edge. Once the configuration is terminated, apply
an external clock (100Hz to 2kHz) to the EN/DIM pin for PWM dimming (RDUTY = 4.87kΩ).
EN/DIM can be connected to VIN through a maximum 100kΩ resistor. In two-step dimming, EN
is off and the PWM dimming function is de-activated. Pull EN/DIM above 2.5V for 100% dimming
duty; pull it below 1V for a configurable dimming duty set by RDUTY (see Table 1 on page 45).
3
EN/DIM
Supply voltage. The MPQ7200A operates from a 6V to 42V input rail. An input capacitor (CIN)
is required to decouple the input rail. Connect VIN to the input rail using a wide PCB trace.
4, 13
VIN
Power ground. PGND is the reference ground of the power device, including the configuration
PGND pins (VCC, IREF, ISET, NTC, and DUTY), so it requires careful consideration when designing
the PCB layout. PGND is also usually used to dissipate the thermal heat.
5, 6,
11, 12
Bootstrap. Connect a capacitor between the SW and BST pins to form a floating supply across
7
BST
SW
the high-side MOSFET driver. A resistor can be placed between SW and the BST capacitor to
reduce the SW spike voltage and improve EMI performance.
Switch output. SW is the middle point of the high-side and low-side MOSFETs. The SW node
on the PCB should be small and have a wide trace to reduce noise coupling and improve EMI.
8, 9
Fault indicator. FAULT is an open-drain output with an internal 300kΩ pull-up resistor
connected to VIN and a 4MΩ pull-down resistor connected to INGND. FAULT pulls low if a fault
(LED short, LED open, over-temperature protection, false mode detection, or over-current
protection) occurs. FAULT can be continuously connected to VIN through a pull-up resistor.
10
FAULT
VIN, EN/DIM, and FAULT ground for buck-boost topology. For a buck topology, connect
INGND to PGND/AGND.
14
15
INGND
AGND
Analog ground. Reference ground of the logic circuit. Connect AGND to PGND via an external
trace.
Internal bias supply. VCC supplies power to the internal control circuit and gate drivers. A
decoupling capacitor (with a real capacitance ≥3µF) must be connected from VCC to ground,
and placed close to VCC. Consider the capacitance derating. A 10μF/10V or 16V X7R capacitor
is recommended.
16
17
VCC
IREF
Mode selection and NTC reference current setting. Connect a ≤9.09kΩ resistor to IREF to
select buck-boost mode and a ≥14.7kΩ resistor to select buck mode. The voltage of IREF is
0.57V after mode detection finishes. Connect a resistor (RIREF) from IREF to GND to get a
reference current (0.57V / RIREF). If the IREF pin is shorted to ground or an open condition is
detected, the part latches off and asserts FAULT. The current on the NTC pin is 50 times (buck
mode) or 5 times (buck-boost mode) the reference current of IREF.
LED current set. Connect an external resistor to the ISET pin to set the LED average current.
18
19
ISET If the ISET pin is shorted to ground or an open condition is detected, the part latches off and
asserts FAULT.
Remote temperature sense. Connect a negative temperature coefficient (NTC) and a resistor
NTC network from the NTC pin to AGND to configure the temperature derating starting point. The
MPQ7200A provides protections for NTC shorts to PGND, AGND, INGND, and the battery.
MPQ7200A Rev. 1.0
11/1/2021
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