MP38875 – 15A, 16V, 800kHz STEP-DOWN WITH SYNCHRONOUS GATE DRIVER
PIN FUNCTIONS
Pin #
Name
Description
1
VCC
BG Driver Bias Supply. Decouple with a 1µF ceramic capacitor.
Timing output to drive another MP38875 (or similar device) SYNCIN for phase-shift
operation.
2
SYNCOUT
3
4
5
SYNCIN External Frequency Synchronization. Connect to GND if not used.
EN On/Off Control.
SS/TRK Soft-Start/Track Input. Connect a capacitor to ground.
Feedback. An external resistor divider from the output to GND, tapped to the FB pin,
sets the output voltage. To prevent current limit run away during a short circuit fault
condition the frequency foldback comparator lowers the oscillator frequency when the
FB voltage is below 400mV.
6
7
8
FB
COMP
PG
Compensation. Connect R/C network to ground.
Power Good Indicator. Connect this pin to VCC or VOUT by a 100kꢀ pull-up resistor.
The output of this pin is an open drain if the output voltage is within 10% of the
nominal voltage, otherwise it is LOW. If PG is initially at open drain, there is a 20µs
delay to pull PG if the output voltage is less than 10% regulation window.
Bootstrap. This capacitor is needed to drive the power switch’s gate above the supply
voltage. It is connected between SW and BS pins to form a floating supply across the
power switch driver.
9
BST
VIN
10, 18,
Exposed Pad
Supply Voltage. The MP38875 operates from a +4.5V to +16V unregulated input. C1
is needed to prevent large voltage spikes from appearing at the input.
11-17
19
SW
GATE
GND
Switch Output. These pins are fused together.
Gate Driver Output. Connect this pin to the synchronous MOSFET.
Ground.
20
MP38875 Rev. 0.9
11/20/2009
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