Datasheet > ML22765

ML22765

更新时间： 2024-02-06 23:19:59

品牌	Logo	应用领域
罗姆 - ROHM		/
页数	文件大小	规格书
74页	2287K
描述
P2ROM™内置型

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技术参数
数据手册

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ML22765 技术参数

生命周期：	Active	零件包装代码：	SSOP
包装说明：	SSOP,	针数：	30
Reach Compliance Code：	unknown	风险等级：	5.79
其他特性：	IT ALSO OPERATES AT 4.5 TO 5.5 V NOMINAL SUPPLY VOLTAGE	最大时钟频率 (fCLK)：	0.4 MHz
JESD-30 代码：	R-PDSO-G30	长度：	9.7 mm
内存密度：	16777216 bit	内存集成电路类型：	OTP ROM
内存宽度：	1	功能数量：	1
端子数量：	30	字数：	16777216 words
字数代码：	16000000	工作模式：	SYNCHRONOUS
最高工作温度：	85 °C	最低工作温度：	-40 °C
组织：	16MX1	封装主体材料：	PLASTIC/EPOXY
封装代码：	SSOP	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE, SHRINK PITCH	并行/串行：	SERIAL
认证状态：	Not Qualified	座面最大高度：	1.85 mm
最大供电电压 (Vsup)：	5.5 V	最小供电电压 (Vsup)：	2.7 V
标称供电电压 (Vsup)：	5 V	表面贴装：	YES
技术：	CMOS	温度等级：	INDUSTRIAL
端子形式：	GULL WING	端子节距：	0.65 mm
端子位置：	DUAL	宽度：	5.6 mm
Base Number Matches：	1

ML22765 数据手册

FEDL227XX-07

ML2272X-XXX/ML2276X-XXX

PIN DESCRIPTION (COMMON TO ALL PRODUCTS)

Initial value

Symbol

AIN

I/O

Description

(*1)

Input pin for speaker amplifier.

Input pin for testing.

TESTI0

Fix this pin to “L” level (DGND level). This pin has a pull-down resistor

built in.

Input pin for reset..

At the “L” level, the LSI enters initial state. During reset, the entire

circuitry stops and enters power down state. Input “L” level when

power is supplied. After the power supply voltage is stable, drive this

pin to “H” level. Then the entire circuitry can be powered up.

This pin has a pull-up resistor built in.

(*2)

RESETB

TESTO

Output pin for testing.

Leave this pin open.

Hi-Z

SEL0

SEL1

Memory bank switching pins.

6, 7

Fix these pins to “L” level when the memory bank function is not used.

Digital ground pin. Also serves as a ground pin for the internal

memory.

8, 14,

19, 26

DGND

—

Output pin for command processing status..

CBUSYB

This pin outputs “L” level during command processing. Any command

should be entered when this pin is “H” level.

Connect to the crystal or ceramic resonator.

A feedback resistor around 1 MΩ is built in between this pin and the

XTB pin. Use this pin if need to use an external clock.

If the resonator is used, connect it as close to this pin as possible.

Connects to the crystal or ceramic resonator.

When to use an external clock, leave this pin open.

If the resonator is used, connect it as close to this pin as possible.

Power supply pins for logic circuitry.

XTB

17, 22

DV_DD

—

Connect a capacitor of 0.1 µF or more between these pins and DGND

pins.

18, 20

N.C

—

No-connected pins. Leave these pins open.

Regulator output pin for internal logic circuitry.

Connect a capacitor recommended between this pin and DGND pin.

Regulator output pin for Built-in ROM.

Connect a capacitor recommended between this pin and DGND pin.

Input pin for testing.

V_DDL

V_DDR

TESTI1

—

Fix this pin to “L” level (DGND level). This pin has a pull-down resistor

built in.

Reference voltage output pin for the speaker amplifier built-in.

Connect a capacitor recommended between this pin and DGND pin.

Power supply pin for the speaker amplifier.

Connect a bypass capacitor of 0.1F or more between this pin and

SPGND pin.

—

SPV_DD

—

SPGND

SPP

—

Ground pin for the speaker amplifier.

Positive(+) output pin of the speaker amplifier built-in.

Serves as the LINE output (*3), if built-in speaker amplifier is not used.

Negative(-) output pin of the speaker amplifier built-in.

SPM

Hi-Z

5/73

1...3 4 567 8 9...74

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