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MK80FN256VLL15 PDF预览

MK80FN256VLL15

更新时间: 2024-02-14 16:38:08
品牌 Logo 应用领域
恩智浦 - NXP /
页数 文件大小 规格书
95页 1134K
描述
Kinetis K80 Sub-Family

MK80FN256VLL15 数据手册

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NXP Semiconductors  
Data Sheet: Technical Data  
K80P121M150SF5  
Rev. 5, 11/2016  
Kinetis K80 Sub-Family  
MK80FN256VLL15  
High performance ARM® Cortex®-M4F MCU with up to  
256KB of Flash, 256KB of SRAM, Full Speed USB  
connectivity, and QuadSPI for interfacing to Serial NOR  
flash  
MK80FN256VDC15  
MK80FN256VLQ15  
MK80FN256CAx15  
The K80 sub-family extends Kinetis products with new features  
including QuadSPI serial flash interface and separate voltage  
domain for a sub-set of IO pins. The QuadSPI interface supports  
connections to Non-Volatile Memory for data or code. The  
extended memory resources allow developers to enhance their  
embedded applications with greater capability and features.  
Software compatibility with previous Kinetis devices ensures  
quick transitions from other Kinetis subfamilies. Enhancements  
include High Speed RUN for greater performance, and smart  
Peripherals like LPUART which can operate in STOP modes.  
121 XFBGA (DC)  
8 x 8 x 0.5 mm Pitch  
0.65 mm  
100 LQFP (LL)  
14 x 14 x 1.7 Pitch  
0.5mm  
144 LQFP (LQ)  
20 x 20 x 1.6 Pitch 0.5  
mm  
121 WLCSP (Ax)  
4.64 mm x 4.53 mm  
Performance  
• Up to 150 MHz ARM Cortex-M4 based core with DSP  
Analog modules  
• One 16-bit SAR ADCs, two 6-bit DAC and one  
12-bit DAC  
instructions and Single Precision Floating Point unit  
• Two analog comparators (CMP) containing a  
6-bit DAC and programmable reference input  
• Voltage reference 1.2V  
Memories and memory expansion  
• Up to 256 KB program flash with 256 KB RAM  
• FlexBus external bus interface and SDRAM controller  
• Dual QuadSPI with OTF decryption and XIP  
• 32 KB Boot ROM with built in bootloader  
Operating Characteristics  
• Main VDD Voltage and Flash write voltage  
range:1.71V–3.6 V  
• Supports SDR and DDR serial flash and octal configurations  
• Temperature range (ambient): -40 to 105°C  
• Independent VDDIO for PORTE (QuadSPI):  
1.71V–3.6 V  
System and Clocks  
• Multiple low-power modes  
• Memory protection unit with multi-master protection  
• 3 to 32 MHz main crystal oscillator  
• 32 kHz low power crystal oscillator  
• 48 MHz internal reference  
Communication interfaces  
• USB full-/low-speed On-the-Go controller  
• Secure Digital Host Controller (SDHC) and  
FlexIO  
Timers  
• One I2S module, three SPI, four I2C modules  
and five LPUART modules  
• One 4 ch-Periodic interrupt timer  
• Two 16-bit low-power timer PWM modules  
• Two 8-ch motor control/general purpose/PWM timers  
• Two 2-ch quadrature decoder/general purpose timers  
• Real-time clock with independent 3.3V power domain  
• Programmable delay block  
Security  
• Hardware random-number generator  
• Supports DES, AES, SHA accelerator (CAU)  
• Multiple levels of embedded flash security  
Human-machine interface  
• Low-power hardware touch sensor interface (TSI)  
• General-purpose input/output  
NXP reserves the right to change the production detail specifications as may be  
required to permit improvements in the design of its products.  

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