NXP Semiconductors
Data Sheet: Technical Data
K82P121M150SF5
Rev. 2, 11/2016
Kinetis K82 Sub-Family
MK82FN256VDC15
High performance ARM® Cortex®-M4F MCU with up to
256KB of Flash, 256KB of SRAM, Full Speed USB
connectivity, enhanced Security, and QuadSPI for
interfacing to Serial NOR flash
MK82FN256VLL15
MK82FN256VLQ15
MK82FN256CAx15
The K82 sub-family extends Kinetis products with new hardware
security mechanisms including decryption from serial NOR flash
memory, AES128, AES256 with side band attack protection, and
Elliptical Curve Cryptography acceleration. These advancements
are done while maintaining a high level of compatibility with
previous Kinetis devices. The MCUs range in total flash space
upto 256KB and have 256KB of SRAM. The QuadSPI interface
supports connections to Non-Volatile Memory for data or code.
The extended memory resources and new security features
allow developers to enhance their embedded applications with
greater capability.
121 XFBGA (DC)
8 x 8 x 0.5 mm Pitch
0.65 mm
100 LQFP (LL)
14 x 14 x 1.7 Pitch
0.5mm
144 LQFP (LQ)
20 x 20 x 1.6 Pitch 0.5
mm
121 WLCSP (Ax)
4.64 mm x 4.53 mm
Performance
• Up to 150 MHz ARM Cortex-M4 based core with DSP
Analog modules
• One 16-bit SAR ADCs, two 6-bit DAC and one
12-bit DAC
instructions and Single Precision Floating Point unit
• Two analog comparators (CMP) containing a
6-bit DAC and programmable reference input
• Voltage reference 1.2V
Memories and memory expansion
• Up to 256 KB program flash with 256 KB RAM
• FlexBus external bus interface and SDRAM controller
• Dual QuadSPI with OTF decryption and XIP
• 32 KB Boot ROM with built in bootloader
Operating Characteristics
• Main VDD Voltage and Flash write voltage
range:1.71V–3.6 V
• Supports SDR and DDR serial flash and octal configurations
• Temperature range (ambient): -40 to 105°C
• Independent VDDIO for PORTE (QuadSPI):
1.71V–3.6 V
System and Clocks
• Multiple low-power modes
• Memory protection unit with multi-master protection
• 3 to 32 MHz main crystal oscillator
• 32 kHz low power crystal oscillator
• 48 MHz internal reference
Communication interfaces
• USB full-/low-speed On-the-Go controller
• Secure Digital Host Controller (SDHC) and
FlexIO
Timers
• One I2S module, three SPI, four I2C modules
and five LPUART modules
• One 4 ch-Periodic interrupt timer
• Two 16-bit low-power timer PWM modules
• Two 8-ch motor control/general purpose/PWM timers
• Two 2-ch quadrature decoder/general purpose timers
• Real-time clock with independent 3.3V power domain
• Programmable delay block
Security
• LP Trusted Crypto (LTC) hardware
accelerators supporting AES, DES, 3DES,
RSA and ECC
• Hardware random-number generator
• Supports DES, AES, SHA accelerator (CAU)
• Multiple levels of embedded flash security
Human-machine interface
• Low-power hardware touch sensor interface (TSI)
• General-purpose input/output
NXP reserves the right to change the production detail specifications as may be
required to permit improvements in the design of its products.