MGA-43128
High Linearity (700-800) MHz Wireless Data Power Amplifier
Data Sheet
Description
Features
High gain: 33.4 dB
Avago Technologies’ MGA-43128 is a high-linearity
power amplifier for use in the (700-800) MHz band. High Power linear output: 29.1 dBm at 5 V supply (2.5%
High linear output power at 5V is achieved using Avago
Technologies’ proprietary 0.25 m GaAs Enhancement-
mode pHEMT process. It is housed in a miniature 5.0 x 5.0
EVM, LTE 3GPP.TS 36.104, 10 MHz bandwidth OFDMA)
Built-in detector and shutdown switches
Switchable gain: 18 dB attenuation using one single
3
x 0.85 mm 28-lead QFN package. It includes a shutdown
CMOS compatible switch pin
and single-bit gain switch function. A detector is also
included on-chip. The compact footprint coupled with
high gain and high efficiency makes the MGA-43128 an
ideal choice for UMTS 3GPP LTE driver and final stage
amplifier applications.
3GPP spectral mask compliant at 29 dBm output power
[1]
GaAs E-pHEMT Technology
3
Low cost small package size: 5.0 x 5.0 x 0.85 mm
MSL-2a, lead-free and halogen free
Useable at 3.3 V supply for lower supply voltage
applications (27 dBm at 2.5% EVM, LTE 3GPP.TS 36.101,
10MHz bandwidth SC-FDMA)
Component Image
3
5.0 x 5.0 x 0.85 mm 28-lead QFN Package (Top View)
Specifications
750 MHz; Vdd = Vbias = 5.0 V, Vc1 = 2.8 V, Vc2 = 2.4 V, Iqtotal
= 370 mA (typ), LTE 3GPP.TS 36.104, 10 MHz bandwidth
OFDMA
33.4 dB Gain
29.1 dBm Linear Pout (2.5% EVM)
36 dBm OP1dB
NC
NC
NC
Vdd2/RFout
Vdd2/RFout
Vdd2/RFout
Vdd2/RFout
Vdd2/RFout
NC
43128
YYWW
XXXX
NC
RFin
NC
Gnd
NC
Vbyp
22% PAE @ Linear Pout
3.3 V Vdet @ Linear Pout
18 dB Switchable Gain Attenuation (Low Gain Mode)
40 A Shutdown Current (Vc = Vbias = 0 V)
Notes:
Package marking provides orientation and identification
“43128” = Device Part Number
“YYWW” = Year and Work Week
“XXXX” = Assembly Lot Number
Applications
High linearity amplifier for (700-800) MHz LTE AP, CPE,
Functional Block Diagram
and Picocell
Base Station Driver Amplifier
M1
Vdd1
Note:
1. Enhancement mode technology employs positive Vgs, thereby
eliminating the need of negative gate voltage associated with
conventional depletion mode devices.
RFin
Match
Vdd2/RFout
Vdet
Attention: Observe precautions for
handling electrostatic sensitive devices.
ESD Machine Model = 50 V
ESD Human Body Model = 500 V
Refer to Avago Application Note A004R:
Electrostatic Discharge, Damage and Control.
Bias
Bias
Vc2
MMIC
Vbyp
Vc1