MG84FL54B
Full-Speed USB micro-controller
1. General Description..........................................................................................................4
2. Features ...........................................................................................................................5
3. Block Diagram ..................................................................................................................6
4. Pin Configurations ............................................................................................................7
4.1. Pin-out for 48-pin Package ......................................................................................7
4.2. Pin Description.........................................................................................................8
5. Special Function Registers (SFRs).................................................................................10
5.1. SFR Mapping.........................................................................................................10
5.2. The Standard 8051 SFRs......................................................................................11
5.3. The Auxiliary SFRs................................................................................................12
6. Flash Memory Configuration...........................................................................................14
7. On-chip expanded RAM (XRAM)....................................................................................15
8. Dual Data Pointer Register (DPTR)................................................................................16
9. Configurable I/O Ports ....................................................................................................17
9.1. Port Configurations................................................................................................17
9.1.1. Quasi-bidirectional....................................................................................................18
9.1.2. Open-Drain Output ...................................................................................................18
9.1.3. Input-Only (Hi-Z) .....................................................................................................19
9.1.4. Push-Pull Output.......................................................................................................20
9.2. Maximum Ratings for Port Outputs........................................................................20
10. Three 16-bit Timers ........................................................................................................21
10.1. Timer 0 and Timer 1 ..............................................................................................21
10.1.1. Mode 0: 13-bit Counter.............................................................................................21
10.1.2. Mode 1: 16-bit Counter.............................................................................................22
10.1.3. Mode 2: 8-bit Auto-reload ........................................................................................22
10.1.4. Mode 3: Timer 0 as Two 8-bit Counter ....................................................................23
10.1.5. Programmable Clock Output from Timer 0..............................................................23
10.2. Timer 2 ..................................................................................................................24
10.2.1. Capture Mode (CP)...................................................................................................25
10.2.2. Auto-Reload Mode (AR) ..........................................................................................26
10.2.3. Baud-Rate Generator Mode (BRG) ..........................................................................28
10.2.4. Programmable Clock Output from Timer 2..............................................................29
11. Enhanced UART.............................................................................................................30
11.1. Frame Error Detection ...........................................................................................30
11.2. Automatic Address Recognition.............................................................................30
11.3. Baud Rate Setting..................................................................................................32
12. Interrupt ..........................................................................................................................35
12.1. Two Priority Levels ................................................................................................37
12.2. Interrupt System ....................................................................................................38
12.3. Note on Interrupt during ISP/IAP ...........................................................................38
13. Additional External Interrupts (INT2 and INT3)...............................................................39
This document contains information on a new product under development by Megawin. Megawin reserves the right to change or discontinue this product
without notice.
© Megawin Technology Co., Ltd. 2008 All rights reserved.
2008/12. version A2
MEGAWIN
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